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FDC2214EVM: FDC2214 temperature drift between channel pairs

Part Number: FDC2214EVM
Other Parts Discussed in Thread: FDC2214,

Hello,

I would like to ask you a question about temperature drift od FDC2214 chip. I am using FDC2214 Evaluation Module and while testing it I notised that there is significant measurement drift  between channel pairs. In application where I am going to use FDC2214 chip, I need to receive at most independent capacitance measurement results from temperature as possible (my device is dedicated to work outside in different weather conditions).  At first I have read capacitance value in room temperature from Sensing Solutions EVM GUI. In the second step, I have warmed up Evaluation board to about 60 degrees Celcius and read results again. The test was performed without touch sensor board.

Channel.    Room temp.    Afret heating       DeltaCap[pF]
0                18.419998      20.361565          1,941567
1                17.273549      19.138614          1,865065
2                18.425148      19.908471          1,483323
3                18.087430      19.507414          1,419984

As we can see, the difference in capacitance between channels 0,1 and 2,3 is about 0.5pF. I am going to use FDC2214 chip in liquid level measurents, where I would like to connect Enviroment electrode to channel 0 and Reference electrode to channel 2. With such big temperature drift, the ratiometric algorithm that should be used to get liquid level in cointainter can not work properly.  On schematic placed in datasheet, we can see that output channels are switching by multiplexer to the core, so each channel should be measured the same way. The only thing which comes to my mind is that oryginally on 0 and 1 channels there where attached capacitive buttons and the tracks on this channels ale a little bit longer than in 2 and 3 channel but I need confirmation.

 Could you explain to me, where this difference is comming from?

  • Hi Kornel,

    The FDC2214EVM User's Guide has the EVM layout. There are very slight differences between the channel layouts that could contribute some parasitic capacitances. However, the differences are more likely due to the tolerances of the inductor and capacitor in each channel's LC tank.

    How are you calculating the capacitance? The minimum measured capacitance should be 33pF on each channel, because this is the value of the capacitor in the LC tank.

    Best Regards,

  • Hi Kristin 

    All values I gave in last post are Sensor Capacitance measurements (Total Capacitance minus Parallel Capacitance). All values came from Sensing Solutions EVM GUI with almost all configurable parameters set default (I have changed only Input Deglitch Filters values, because default values were to low and I got warnings).

    As I mentioned in last post, I am aware that there are some difference in traces lenght between channel pairs in EMV board. The thing is I was a little bit surprised that after I have warmed up sensor board, the difference between channel pairs grew so much on 0 and 1 channels and they were pretty consistent. I want to be sure for 100% that it depends only from layout design and LC tank parts tolerance.

    Best Regards,

    Kornel.

  • Hi Kornel,

    Thanks for clarifying the capacitance measurement. I think it's likely that the channel differences are coming primarily from the parts tolerances in the LC tank and changes in the inductance over temperature. One quick way to check this is to swap two channels' inductors and repeat the experiment. If the drift follows the inductors, then they are most likely the cause. 

    Best Regards,

  • Hi Komel,

    I haven't heard from you in a while, so I'm assuming you were able to solve your problem. If this is not the case, please feel free to respond to this thread or ask a new question. 

    Best Regards,