AWR1843: MibSPI does not capture Rx data into SPIBUF

Kensuke

Expert 1140 points

Part Number: AWR1843
Other Parts Discussed in Thread: MMWAVE-SDK

Hi MibSPI specialist,

I am facing the problem that MibSPI does not capture Rx data into SPIBUF.

I use SPI mode as a master device, and execute readout operation of slave device (CAN transceiver) ID register.

When observing each signal of SCLK, MOSI and MISO with an oscilloscope, it is expected waveform .

However, capturing to SPIBUF is not performed.

RXEMPTY changes from 1 to 0. However, the data is All 0.

I attach a waveform and a register dump.

The waveforms are MOSI, SCLK and MISO from the top signal.

Are there any restrictions?

Best regards,

over 6 years ago

0 Cesar over 6 years ago

TI__Guru*** 148954 points

Hi,

We have contacted our HW team. Will get back to you as soon as possible

thank you

Cesar

0 Kensuke over 6 years ago in reply to Cesar

Expert 1140 points

Hi Cesar,

Did you get any kind of information?

Thanks,

0 Vivek Dham over 6 years ago in reply to Kensuke

TI__Guru 58035 points

Hello KH,

What is the SPI configuration on the AWR 1843 device and the CAN transceiver ? Which is the CAN device you are using?

Regards,

Vivek

0 Kensuke over 6 years ago in reply to Vivek Dham

Expert 1140 points

Hi Vivek,

I use NXP TJA1145 as a CAN transceiver, and configure SCLK=1MHz, use MISO, MOSI, CS.

SPI mode is used on AWR1843.

The waveform I attached shows the MISO data is outputted correctly, but the data does not come into RXBUF.

Thanks,

0 Raghunandan Kamath over 6 years ago in reply to Kensuke

TI__Mastermind 22155 points

Hi KH,

Are you using the SPIA/SPIB?

Can you please let us know the SPI driver that you use in your application? Is it the MiBSPI driver from the MMWAVE-SDK?

Also can you please post any changes that you have done in the SPI driver code ?

-Raghu

0 Kensuke over 6 years ago in reply to Raghunandan Kamath

Expert 1140 points

Hi Raghu,

I tried to use the SPIA and SPIB, and I got same result.

I use own SPI driver I attached.

Please refer to the attached source code.

SPIInterface_Init () is initialize API, and SPIInterface_Transmit() is transmit API.

Spi_test_sub() is test code using transmit API.

SPI_read() outputs all zero data.

Fullscreen SPI.c Download

/***** Implementation *************************************************/

typedef volatile struct {
    u32    SPIGCR0                            ;        /* Offset = 0x000 */
    u32    SPIGCR1                            ;        /* Offset = 0x004 */
    u32    SPIINT0                            ;        /* Offset = 0x008 */
    u32    SPILVL                             ;        /* Offset = 0x00C */
    u32    SPIFLG                             ;        /* Offset = 0x010 */
    u32    SPIPC0                             ;        /* Offset = 0x014 */
    u32    SPIPC1                             ;        /* Offset = 0x018 */
    u32    SPIPC2                             ;        /* Offset = 0x01C */
    u32    SPIPC3                             ;        /* Offset = 0x020 */
    u32    SPIPC4                             ;        /* Offset = 0x024 */
    u32    SPIPC5                             ;        /* Offset = 0x028 */
    u32    SPIPC6                             ;        /* Offset = 0x02C */
    u32    SPIPC7                             ;        /* Offset = 0x030 */
    u32    SPIPC8                             ;        /* Offset = 0x034 */
    u32    SPIDAT0                            ;        /* Offset = 0x038 */
    u32    SPIDAT1                            ;        /* Offset = 0x03C */
    u32    SPIBUF                             ;        /* Offset = 0x040 */
    u32    SPIEMU                             ;        /* Offset = 0x044 */
    u32    SPIDELAY                           ;        /* Offset = 0x048 */
    u32    SPIDEF                             ;        /* Offset = 0x04C */
    u32    SPIFMT0                            ;        /* Offset = 0x050 */
    u32    SPIFMT1                            ;        /* Offset = 0x054 */
    u32    SPIFMT2                            ;        /* Offset = 0x058 */
    u32    SPIFMT3                            ;        /* Offset = 0x05C */
    u32    TGINTVECT0                         ;        /* Offset = 0x060 */
    u32    TGINTVECT1                         ;        /* Offset = 0x064 */
    u32    SPIPC9                             ;        /* Offset = 0x068 */
    u32    SPIPMCTRL                          ;        /* Offset = 0x06C */
    u32    MIBSPIE                            ;        /* Offset = 0x070 */
    u32    TGITENST                           ;        /* Offset = 0x074 */
    u32    TGITENCR                           ;        /* Offset = 0x078 */
    u32    TGITLVST                           ;        /* Offset = 0x07C */
    u32    TGITLVCR                           ;        /* Offset = 0x080 */
    u32    TGINTFLAG                          ;        /* Offset = 0x084 */
    u32    RESTRICTED2[2]                     ;        /* Offset = 0x088 */
    u32    TICKCNT                            ;        /* Offset = 0x090 */
    u32    LTGPEND                            ;        /* Offset = 0x094 */
    u32    TGCTRL[8]                          ;        /* Offset = 0x098 */
    u32    RESTRICTED3[8]                     ;        /* Offset = 0x0B8 */
    u32    DMACTRL[5]                         ;        /* Offset = 0x0D8 */
    u32    RESTRICTED4[3]                     ;        /* Offset = 0x0EC */
    u32    ICOUNT[5]                          ;        /* Offset = 0x0F8 */
    u32    RESTRICTED5[3]                     ;        /* Offset = 0x10C */
    u32    DMACNTLEN                          ;        /* Offset = 0x118 */
    u32    RESTRICTED6                        ;        /* Offset = 0x11C */
    u32    PAR_ECC_CTRL                       ;        /* Offset = 0x120 */
    u32    PAR_ECC_STAT                       ;        /* Offset = 0x124 */
    u32    UERRADDR1                          ;        /* Offset = 0x128 */
    u32    UERRADDR0                          ;        /* Offset = 0x12C */
    u32    RXOVRN_BUF_ADDR                    ;        /* Offset = 0x130 */
    u32    IOLPBKTSTCR                        ;        /* Offset = 0x134 */
    u32    EXTENDED_PRESCALE1                 ;        /* Offset = 0x138 */
    u32    EXTENDED_PRESCALE2                 ;        /* Offset = 0x13C */
    u32    ECCDIAG_CTRL                       ;        /* Offset = 0x140 */
    u32    ECCDIAG_STAT                       ;        /* Offset = 0x144 */
    u32    SBERRADDR1                         ;        /* Offset = 0x148 */
    u32    SBERRADDR0                         ;        /* Offset = 0x14C */
    u32    RESTRICTED7[43]                    ;        /* Offset = 0x150 */
    u32    SPIREV                             ;        /* Offset = 0x1FC */
} MIBSPIREG;

void SPI_open(SpiChannelType i_ch);
void SPI_close(SpiChannelType i_ch);
void SPI_write(SpiChannelType i_ch, u16 i_wdata);
bool SPI_read(SpiChannelType i_ch, u16 *o_rdata);


#define MIBSPI_MIBSPIE_INIT         0x00000500UL    /* compatibility mode */
#define MIBSPI_SPIGCR0_RESET        0x00000000UL
#define MIBSPI_SPIGCR0_INIT         0x00000001UL
#define MIBSPI_SPIGCR1_INIT         0x00000003UL
#define MIBSPI_SPIGCR1_SPIEN        0x01000000UL    /* SPIEN=1 */
#define MIBSPI_SPIINT0_INIT         0x00000000UL


#define MIBSPI_SPIPC0_INIT          0x01010F01UL
//#define MIBSPI_SPIPC0_INIT          0x01010E01UL
/* SPIPC0 format
    bit31-24 : SOMIFUN  = 00000001
    bit23-16 : SIMOFUN  = 00000001
    bit11    : SOMIFUN0 = 1
    bit10    : SIMOFUN0 = 1
    bit9     : CLKFUN   = 1
    bit8     : ENAFUN   = 1
    bit7-0   : SCSFUN   = 00000001
*/

#define MIBSPI_SPIPC1_INIT          0x00010701UL
//#define MIBSPI_SPIPC1_INIT          0x01010F01UL
/* SPIPC1 format
    bit31-24 : SOMIDIR  = 00000000
    bit23-16 : SIMODIR  = 00000001
    bit11    : SOMIDIR0 = 0
    bit10    : SIMODIR0 = 1
    bit9     : CLKDIR   = 1
    bit8     : ENADIR   = 1
    bit7-0   : SCSDIR   = 00000001
*/

//#define MIBSPI_SPIFMT0_INIT         0x03000010UL    /* data word length = 16bit */
#define MIBSPI_SPIFMT0_INIT         0x00000010UL    /* data word length = 16bit */
/* SPIFMTx format
    bit31-24 : WDELAY      = 00000011 (transmit delay: WDELAY * PVBUSPCLK + 2 * PVBUSPCLK. PVBUSPCLK -> Period of VBUSPCLK)
    bit23    : PARPOL      = 0        (0:parity even, 1:parity odd)
    bit22    : PARITYENA   = 0        (0:parity disable, 1:parity enable)
    bit21    : WAITENA     = 0        (0:not wait ENA, 1:wait ENA)
    bit20    : SHIFTDIR    = 0        (0:MSB first, 1:LSB first)
    bit19    : HDUPLEX_ENA = 0        (0:full duplex(normal), 1:half duplex)
    bit18    : DISCSTIMERS = 0        (0:delay enable, 1:delay disable)
    bit17    : POLARITY    = 0        (0:clock low inactive, 1:clock high inactive)
    bit16    : PHASE       = 0        (0:no data delay, 1:half clock data delay)
    bit15-8  : PRESCALE    = 00000000 (0:clock=VBUSPCLK/2, 1:clock=VBUSPCLCK/(PRESCALEx+1))
    bit4-0   : CHARLEN     = 10000
*/
#define MIBSPI_SPIDELAY_INIT        0x00000000UL    /* C2TDELAY=0, T2CDELAY=0 */
#define MIBSPI_SPIDAT1_VALUE        0x14000000UL
/* SPIDAT1 format
    bit28    : CSHOLD = 1
    bit26    : WDEL   = 1
    bit25-24 : DFSEL  = 00
    bit23-16 : CSNR   = 00000000
    bit15-0  : TXDATA
*/
#define MIBSPI_EXTENDED_PRESCALE1_INIT  0x000000C0UL
/* EXTENDED_PRESCALE1 format
    bit26-16 : EPRESCLAE_FMT1 = 00000000000     (clock=VBUSPCLK/(EPRESCLAE_FMT1+1))
    bit10-0  : EPRESCLAE_FMT0 = 00011000000     (clock=VBUSPCLK/(EPRESCLAE_FMT0+1))
*/


MIBSPIREG   *MIBSPI = ((volatile MIBSPIRegs *)SOC_XWR18XX_MSS_MIBSPIA_BASE_ADDRESS);

static  u32 l_MIBSPIE;
static  u32 l_SPIPC0;
static  u32 l_SPIPC1;
static  u32 l_SPIGCR1;
static  u32 l_SPIINT0;
static  u32 l_SPIFMT0;
static  u32 l_SPIDELAY;
static  u32 l_SPIDAT1;
static  u32 l_EXTENDED_PRESCALE1;
static  u32 l_spiemu;
static  u32 l_spibuf;
static  u16 l_spiWriteData = 0xFD00;
static  u16 l_spiReadData = 0;
static  u16 l_spiOkData = 0;

void SPIInterface_Init(void)
{
    l_MIBSPIE    = MIBSPI_MIBSPIE_INIT;
    l_SPIPC0     = MIBSPI_SPIPC0_INIT;
    l_SPIPC1     = MIBSPI_SPIPC1_INIT;
    l_SPIGCR1    = MIBSPI_SPIGCR1_INIT;
    l_SPIINT0    = MIBSPI_SPIINT0_INIT;
    l_SPIFMT0    = MIBSPI_SPIFMT0_INIT;
    l_SPIDELAY   = MIBSPI_SPIDELAY_INIT;
    l_EXTENDED_PRESCALE1 = MIBSPI_EXTENDED_PRESCALE1_INIT;
    l_SPIDAT1    = MIBSPI_SPIDAT1_VALUE;
}

void Spi_test_sub(void)
{
#define INTERVAL_GAP_US                 0

    u32     l_sTime;
    u32     l_nTime;
    u32     l_cnt;

    while(1){
            l_spiWriteData = 0;
            for(l_cnt=0;l_cnt<0x100;l_cnt++){
                l_spiWriteData = (u16)((l_cnt << 8) | 0x01AAU);
                l_spiReadData = 0;

                SPIInterface_Transmit(SPICH_CANTRANCEIVER, l_spiWriteData, &l_spiReadData);
                if(l_spiReadData != 0){
                    l_spiOkData = l_spiReadData;
                }
                l_sTime = TIMERInterface_GetTickCount1us();
                do {
                    l_nTime = TIMERInterface_GetTickCount1us();
                    if((l_nTime - l_sTime) > INTERVAL_GAP_US){
                        break;
                    }
                } while(TRUE);
            }
    }
}

void SPIInterface_Transmit(const SpiChannelType i_ch,const u16 i_txData,u16* o_rxData)
{
    SPI_open(i_ch);
    SPI_write(i_ch, i_txData);
    SPI_read(i_ch, o_rxData);
    SPI_close(i_ch);
}

void SPI_open(SpiChannelType i_ch)
{
    u32     l_sTime;
    u32     l_nTime;

    /* Reset SPI */
    MIBSPI->SPIGCR0    = MIBSPI_SPIGCR0_RESET;
    MIBSPI->SPIGCR0    = MIBSPI_SPIGCR0_INIT;

    l_sTime = TIMERInterface_GetTickCount1us();
    do {
        l_nTime = TIMERInterface_GetTickCount1us();
        if((l_nTime - l_sTime) > 10000){
            break;
        }
    } while(TRUE);

    MIBSPI->MIBSPIE    = l_MIBSPIE;
    MIBSPI->SPIPC0     = l_SPIPC0;
    MIBSPI->SPIPC1     = l_SPIPC1;
    MIBSPI->SPIGCR1    = l_SPIGCR1;
    MIBSPI->SPIINT0    = l_SPIINT0;
    MIBSPI->SPIFMT0    = l_SPIFMT0;
    MIBSPI->SPIDELAY   = l_SPIDELAY;
    MIBSPI->EXTENDED_PRESCALE1 = l_EXTENDED_PRESCALE1;

    /* SPIEN = 1 */
    MIBSPI->SPIGCR1 = l_SPIGCR1 | MIBSPI_SPIGCR1_SPIEN;
}

void SPI_close(SpiChannelType i_ch)
{
    /* SPIEN = 0 */
    MIBSPI->SPIGCR1 = MIBSPI_SPIGCR1_INIT;
}

void SPI_write(SpiChannelType i_ch, u16 i_wdata)
{
    u32     l_sTime;
    u32     l_nTime;

    l_sTime = TIMERInterface_GetTickCount1us();
    do {
        if((MIBSPI->SPIBUF & 0x20000000UL) == 0){
            MIBSPI->SPIDAT1 = (u32)i_wdata | l_SPIDAT1;
            /* CSHOLD=1, WDEL=0,DFSEL=0 */
            MIBSPI->SPIDAT1 = (u32)i_wdata | MIBSPI_SPIDAT1_VALUE;
            break;
        }
        l_nTime = TIMERInterface_GetTickCount1us();
        if((l_nTime - l_sTime) > 10000){
            break;
        }
    } while(TRUE);
}

bool SPI_read(SpiChannelType i_ch, u16 *o_rdata)
{
    bool    l_isReceive = FALSE;
    u32     l_sTime;
    u32     l_nTime;

    l_sTime = TIMERInterface_GetTickCount1us();
    do {
        l_spibuf = MIBSPI->SPIBUF;
        if((l_spibuf & 0x80000000UL) == 0){
            *o_rdata = (u16)l_spibuf;
            l_isReceive = TRUE;
            break;
        }
        l_nTime = TIMERInterface_GetTickCount1us();
        if((l_nTime - l_sTime) > 10000){
            break;
        }
    } while(TRUE);

    return l_isReceive;
}

Thanks,

0 Kensuke over 6 years ago in reply to Kensuke

Expert 1140 points

Hi Raghu,

Can you get the receive data from RXBUF in SPI mode?

If so, please share with your driver.

Thanks,

0 Kensuke over 6 years ago in reply to Kensuke

Expert 1140 points

Hi Vivek, Raghu,

Do you have any updates?

Sorry for rush you but please kindly provide information.

Thanks,

0 Kensuke over 6 years ago in reply to Kensuke

Expert 1140 points

Hi Vivek, Raghu,

Do you have Any updates?

Should I contact FAE?

Thanks,

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AWR1843: MibSPI does not capture Rx data into SPIBUF