Hello,
While working on a design using the Altium files for the IWR6843ISK we found something that raised concern. Below is a comment from my PCB engineer:
Can you find out if there was a reason Texas Instruments left this DRC violation Net Antenna VIA (Open/floating VIA), at the CB_PMIC_1V8 net on layer 3 in the IWR6843ISK, PROC073A design. And, if there was no apparent reason then, Can we delete it from the design to get a clean DRC report?
Attached are the screen shots of the Net Antennae (Open/floating VIA) DRC violation that TI left in the IWR6843ISK, PROC073A design.
DRC Violation as reported in Altium:
Net Antennae (Tolerance=0mil) (All) |
Net Antennae: Via (1744.999mil,309.998mil) from Top Layer to Bottom Layer |
Any information you can provide about this via and its purpose or what it should be connected to, or if it should just be left floating would be much appreciated.
Ted