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Original question:

FDC1004: Question

FDC1004: Error in capacitance reading when enabling CAPDAC

Ben Huber
Prodigy 20 points
Part Number: FDC1004
.
Question about CAPDAC accuracy, step size, CAPDAC value interference even if CAPDAC disabled.

Capacitance measurements with capdac disabled and capdac =0 are quite accurate. A 10pF capacitance can be measure within 0.2pF consistently.
Problem: if capdac is enabled, even with the capdac value 0, the capacitance reading changes. On the EVM, with TI tool running, on one channel a reading may change by +0.2, while on the other channel it may change by +0.7pF. This seems to be chip dependent.
On one of our inhouse boards, the value changes by 1.5pF simply by enabling CAPDAC.
On Our EVM: Cin1: +0.2pF, CIn2 +0.3pF, Cin3 +0.7pF, Cin4 +0.5pF
Furthermore, on EVM, with no capacitances connected (just PCB traces) , capdac disabled, capdac value = 0 a typical reading is 0.2pF.
Keep CAPDAC disabled. Change capdac to 13: result: reading increases by 0.3 pF.
To replicate on EVM:
connect known value or 0 capacitance.
Run EVM, take reading with capdac off, value 0.
Increase capdac to different value -> reading will change by 0.2-0.3pF
Make capdac value 0 (integer count 0), then turn capdac on -> cap reading will change by +0.2 to 1.5pF.
Is this expected? Do I expect too much from capdac accuracy?
  • 0
    TI__Expert 7599 points

    Hello User,

    Our expert on the FDC is out of office and will get back to you by end of next week. Also, can you help make measurements with a known capacitance ? if the input capacitance is near 0 then there isn't a need for CAPDAC and CAPDAC is really meant for applications that potentially need >+/- 15pF of input capacitance.

    Meanwhile it appears that there is a question related to CAPDAC accuracy in our forum. Can you please review this and let us know if this helps ?

    https://e2e.ti.com/support/sensors/f/1023/t/799540#pi320995=2 

  • 0 in reply to Arjun_Prakash
    Prodigy 20 points

    I researched online about capdac errors. Nothing useful was found related to our porblem: we need to make an absolute capacitance reading.

    There are a few posts that are related but do not discuss absolute accuracy of the fdc1004. Both our board, and the evm produce very!! accurate results as long as capdac is not used. This includes offset register changes.

    We found that we can measure capacitance repeatedly to 32pF (( better than 0.2%) using the offset set to -16pf. Changing the offset changes reading only by .002pF (which is great), so the offset hardware works extremely well.

    We were looking for slightly higher range (single ended) so we decided to turn on the capdac. In doing so we found errors, and inconsistencies in our readings. To eliminate problems with setup and our software we went back to simplest setup using the EVM- resulting in similar results.

    What I am looking for is confirmation that the capdac system introduces fairly large errors on absolute readings. (which may  be difficult to calibrate out_

    Unfortunately this system does not allow me to paste in any graphics which makes it very difficult to show the exact results or setup.

    Is there a direct email contact? Is there a way to paste in graphics?

    ----------------------------------------

    For these tests connect 10pf or similar to each evm input.

    Run evm configuration screen, all channels, continous measurement, capdac off, "code" 0.

    issue 1: capdac code affects reading even if disabled

    With capdac disabled, change "code" -> observe capacitance reading it may change by up to 0.3pF! depends on part/board/batch.

    issue 2: enabled capdac code 0 can result in large error

    Change "code" back to 0 (capdac code). Observe readings. enable capdac. observe reading.

    On our board, the output may change between 0.1pF to 1.5Pf - depends on part. Our EVM is between 0.2 and 0.9pF.

    Issue 3: enabled capdac, now change "code"

    After the potential large step at 0 (disable-to-enable), changing the capdac code will change output +- 0.2pF more or less for each step.

    In other words a 1 step increase in code will result in a change smaller or larger than 3.125pF, making calibrating an absolute accurate reading very difficult ( all steps need to be calibrated)

    Around transition 8 to 9, that change (error) may be larger (1pF).

  • 0 in reply to Ben Huber
    TI__Genius 17440 points

    Hello Ben,

    It is definitely possible that the CAPDAC is not perfectly linear. The 3.125pF per CAPDAC increment is not in the electrical characteristics table, so it's not something we screen for. It's meant to be a general guideline.

    Please note that the FDC1004 makes very accurate relative capacitance measurements, but it should not be used to replace an LCR meter or similar instrument. It's targeted applications are relative changes in capacitance like liquid level sensing or proximity detection.

    One option to solve the CAPDAC linearity issue is to select your desired CAPDAC setting, then use the OFFSET_CALn registers to compensate for any introduced errors.

    Best Regards,