TMP432: Data hold time in 100kHz frequency

Jason Dai

Part Number: TMP432

Hello E2E,

We have a question on data hold on time.

In fast mode, the data hold time range is from 20ns as min to 900ns as max.

In customer application, they use 100kHz clock frequency as normal mode on i2c interface and the data hold on time is longer than 5us.

Is that ok?

we are confused a little bit.

according to the figure 13 i posted below, the data hold time should be larger than ON time of clock.

In fast mode, the clock frequency is 400kHz and ON time of clock is 1.25us, but the maximum data hold time is 900ns.

please help to clarify our question.

BR,

Jason

over 5 years ago

0 David Vaseliou over 5 years ago

TI__Expert 6820 points

Hi Jason,

What you are referring to is not the hold time. Below is the definition of hold time form JEDEC and TI and an app note on I2C specifications.

th Hold Time

JEDEC - The time interval during which a signal is retained at a specified input terminal after an active transition occurs at another specified input terminal.

TI - The time interval during which a signal is retained at a specified input after an active transition occurs at another specified input.

http://www.ti.com/lit/an/szza036c/szza036c.pdf

Thanks,

0 Jason Dai over 5 years ago in reply to David Vaseliou

TI__Expert 3720 points

Hello David,

What is the data hold time range in 100kHz i2c clock frequency?

BR,

Jason

0 David Vaseliou over 5 years ago in reply to Jason Dai

TI__Expert 6820 points

Hi Jason,

The data hold time in Fast mode can be from 0 ns to 900 ns. This is limited by the max data valid time tvd. If you are running 100 kHz clock in standard mode there is no max data hold time.

Thanks,

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TMP432: Data hold time in 100kHz frequency