Other Parts Discussed in Thread: AWR1243
We are using the AWR2243 on a custom board and trying to get the chips to power up. We have previous experience with the AWR1243. In looking at the example DFP firmware it appears they all set the chips to SOP mode 4 (SOP0 = 0, SOP1 = 0, SOP2 = 1). The device documentation does not mention this SOP mode so I'd like to verify that is the correct SOP mode to download a new firmware image and boot the chip.
We adapted the mmwave_example.c from the mmWaveLink_Cascade_Example directory.
The bahavior that we see is that on power up, after releasing the chip's reset we get an interrupt high event after ~12ms. We subsequently send a series of sync sequences to the device, but it never responds and eventually we timeout waiting for the interrupt line to go low (which it never does).
Questions:
1. Is SOP mode 4 the correct mode to boot and download an AWR2243? We have also tried SOP mode 1 but had the same result.
2. Is there a difference in sync sequence or anything that would result in this behavior? We don't see anything in the code but maybe we are missing something.
3. I have verified with an oscilloscope the behavior of the MCLK, nCS, Interrupt line, etc. I do see MISO going high for the first few words from the SPI and then subsequently pulled low as the rl_driver is searching for sync characters, but none are found.
Thanks.
