Hi support team,
Does TI have the layout of the PCB directly under the device used for reliability test, especially during temperature cycling and thermal shock?
If the answer is yes, could you share it please?
Best Regards,
Katsuhiro
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Hi support team,
Does TI have the layout of the PCB directly under the device used for reliability test, especially during temperature cycling and thermal shock?
If the answer is yes, could you share it please?
Best Regards,
Katsuhiro
Hi Katsuhiro,
For which EVM are you looking for?
Have you seen the hardware Design Files on the IWR6843ISK page?
Regards,
AG
Hi Akash,
My customer referred to the design file which you shared in the link. They confirmed IWR6843ISK Rev C.
They claimed that general BGA layout will not be such a layout (Rev.C) to prevent solder ball breakage.
Did TI perform reliability test with the same layout as EVM? Was it judged OK?
Best Regards,
Katsuhiro
Katsuhiro-san,
You could also refer Datasheet land pattern recommendation (SMD and NSMD) for this this purpose. TI does test devices for the reliability tests for thermal shock cycles and qualified the silicon (including board level reliability involving thermal shock) However it would not be on Rev C EVM hardware. But it would be different hardware suitable only for performing thermal shock tests. However it would use very similar PCB layout in the EVM. We would like to understand what are the concern in using the EVM layout for this purpose?
Thanks and regards,
CHETHAN KUMAR Y.B.
Hi Chethan,
My customer concerns solder ball breakage caused by temperature cycle and/or heat shock.
Is it possible to share the PCB layout used for reliability test for thermal shock cycles?
Best Regards,
Katsuhiro
Katsuhiro-san,
Thank you for the confirmation. We have the IWR6843ISK board which is developed in Altium format. https://www.ti.com/lit/zip/swrc355
Have you reviewed already?
Thanks and regards,
CHETHAN KUMAR Y.B.
Hi Chethan,
My customer already reviewed that design file and then giving us the concern and request.
concern: solderball breakage by thermal cycle/heat shock
request: share the layout which is usde to reliability test
This is the file the customer send us with the concern and request
Best Regards,
Katsuhiro
Katsuhiro-san,
Above excel sheet provides all the layer information of the IWR6843-ISK board.
From this not able to understand what is the concern on solderball breakage by thermal cycle/heat shock? Could you please elaborate gaps in this layout for the thermal shock/reliability tests.
Thanks and regards,
CHETHAN KUMAR Y.B.
Hi Chethan,
I requested our sales team to get the feedback from the customer to answer to your question.
Could you please explain the minimum required items for you to share the layout of the PCB which was used for the reliability test with my customer?
Best Regards,
Katsuhiro
Katsuhiro-san,
These hardware are built specifically for TI test environment, and cannot be shared on E2E. We could share the board level reliability test results under NDA with the customer. Please contact your local sales/Marketing contact.
Thanks and regards,
CHETHAN KUMAR Y.B.
Chethan,
I see. We will contact TI local sales person for the customer's request.
When I get feedback from the customer to your question, I will post in this thread.
Best Regards,
Katsuhiro
Katsuhiro-san,
Sure. Thank you for the confirmation.
Thanks and regards,
CHETHAN KUMAR Y.B.