TDC7200EVM: ns timescale pulse widths for start and stop signals

k1990

Part Number: TDC7200EVM
Other Parts Discussed in Thread: TDC7201, TDC1000

There have been a number of threads on the pulse width of the start and stop signals for the TDC7201.

One of them repeats the specs from the manual that the minimum pulse width is 10 ns.

Another one, which is linked to this question, states that the TDC only checks the rising or falling edge, but not both.

Thus, the corresponding pulse width could be infinite. By that same token, we have a voltage signal with a pulse width of 1 ns. Wouldn't

that pulse width still be acceptable if the device is only checking for the start pulse's rising edge?

Thanks

Keith

over 4 years ago

0 Akeem Whitehead over 4 years ago

TI__Mastermind 27950 points

Hi Keith,

The TDC7201 does require a complete low-to-high and then high-to-low toggle cycle for the digital state machine to confirm a valid START or STOP pulse was received. Thus, the device still requires a 10ns minimum pulse width. Regarding the actual calculation of the time delta between the START and STOP pulses, it is only the low-to-high transition instances that are recorded in the TIMEx registers.

I don't think a 1ns START/STOP pulse width would work, but you are welcome to experiment/try with <10ns pulsing.

0 k1990 over 4 years ago in reply to Akeem Whitehead

Prodigy 60 points

Hi Akeem:

Thank you very much for your response. I will most certainly try out narrower pulses and see what happens.

Please note that in another thread: https://e2e.ti.com/support/sensors/f/1023/t/707308?Compiler-TDC7200EVM-what-is-the-maximum-pulse-width-of-Start-and-Stop-signal-for-TDC7201-

Scott Cummins from TI states that the pulse width could be infinite, which would infer that the TDC never checks the falling edge. Given your comments, I am confused by his remarks.

Thanks

Keith

0 Akeem Whitehead over 4 years ago in reply to k1990

TI__Mastermind 27950 points

Hi Keith,

Scott may have manually checked the pulse width case where the START/STOP pulses are held high indefinitely after the low-to-high transition, but it is not officially characterized by our validation team to be appended to the datasheet. I am not certain what this will do to the digital state machine in the long-term, so I cannot make any guarantees. The TDC72xx digital state machine logic was originally designed with the assumption it would be paired with a device like the TDC1000, which produces START/STOP pulses as expected (10ns minimum toggle).

0 k1990 over 4 years ago in reply to Akeem Whitehead

Prodigy 60 points

Hi Akeem:

Thank you for the clarification.

I am now set.

Thanks for your help!

Keith

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TDC7200EVM: ns timescale pulse widths for start and stop signals