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AWR2243: Chirp frequency and slope tolerance between devices

Jonathan Jones2
Intellectual 680 points
Part Number: AWR2243


Dear TI support,

Please can you let me know what is tolerance of the chirp absolute frequency and chirp ramp rate between AWR2243P devices.

So in the case where two or more devices operate from the same 40MHz reference clock, what would be the maximum absolute frequency tolerance between chirps (i.e difference in frequency of the chirp at the same same ADC sample time) between devices and the tolerance in the chirp ramp rate between devices, assuming all devices using the same chirp settings?

Also you have any measurement data for this that you could share that would be very helpful.

I appreciate your help with this matter.

Yours faithfully,

Jonathan Jones

  • 0
    TI__Guru**** 150344 points

    Hi,

    The hw team will review this question and will get back to you tomorrow

    thank you

    Cesar

  • 0
    TI__Guru 58035 points

    Hello Jonathan,

    The primary difference in frequency will come from the frequency error of the 40Mhz clock. Post that there will be negligible delta in frequency since we use closed loop PLLs to generate the clocks for ADC and RF.

    During the chirp ramp there could some frequency variation from the ideal ramp, which depends on the ramp rate. For 10Mhz/usec ramp rate the frequency error measured is in the order to 50Khz. For 30Mhz/usec ramp rate the error could be 200Khz.  Does this help?

    Regards,

    Vivek