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CCS/AWR6843: Floating Point underflow/overflow detection

Part Number: AWR6843

Tool/software: Code Composer Studio

In one of my activities I added the reading of the FADCR, FAUCR, FMCR registers to check if the overflow (and also underflow) condition occurs on floating point operations.
Sometimes the OVER (and UNDER) bit of the FMCR register is 1: it probably happens during a multiplication operation but I can't reach the exact point and with CCS I can't see any variable with a very high exponent or with the value = "+ inf" (= for overflow)
What strategies can I use to identify the error?

  • Hi Alessandro,

    I believe there should be some exception generation for these conditions by the C runtime or RTOS. Please allow us a few days to check with our tools team on this topic. You could also post the question in Code Composer Studio Forum in the meantime since this is a general question related to the C674x+ core and not specific to MMWAVE sensor devices.

    Regards

    -Nitin

  • Could you also provide some application/problem context around this question? Is this just a general questions or do you see some specific behavior which makes you feel that there could be floating point errors and thus you need to monitor these registers?

  • I try to explain myself better,

    There are several tasks in my project. In one of them I call a function ( "FP_exception()" ) that checks the status of the bit for OVER/UNDERflow detection on the registers FAUCR,FADCR and FMCR.

    When I run the executables, at a certain point, the bits for OVER/UNDERflow are set to 1. It means that some floating point operations on my tasks caused this error.

    My aim is to find the code line where this happens. So I move the function FP_exception() in several parts of the code. But I found out, with this approach, that sometimes the error was not detected.

    So, do you have any suggestion about other ways to deal with this problem?
    Is there any tools (plugin) for CCS useful for this debug?

    Thanks a lot

  • Hi Alessandro,

    Thanks for providing the details. It would be best to post this question in the CCS/Tools forum to find out if there are any asynchronous methods (e.g. an interrupt) available on the CPU or CCS debug support so I would move this question to the above forum. I would also check within our team to find out more on this topic.

    Regards

    -Nitin

     

  • This device should have support for trace as well as data breakpoints (Watchpoints).  However I am not sure that will help here as FAUCR... are core registers.  If they were memory mapped registers you could potentially set a watchpoint on their location and check for overflow.

    You could try something terribly intrusive where you script CCS using Debug Server Scripting to step through the application and check those bits on each step.  Basically a loop that steps, reads the registers, checks the overflow bits, if there is overflow you could then read the PC to figure out where you are that caused the overflow.  This would be very intrusive and slow.  Might need to run it over night.

    Regards,

    John