This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AWR1843: Rx saturation and signal and image band energy monitoring, CQ1 and CQ2 base addresses

Part Number: AWR1843

Hi experts,

I am using AWR1843 , mmwave SDK 3.1.1.2 and trying to read CQ1 and CQ2 in CQ RAM to get monitoring report for signal and image band energy, and Rx saturation respectively (in analog monitor configuaration i have enabled both the monitoring) , but could not find the their base address for CQ2 RAM base address.

I am looking for the CQ2_RAM base Address, like for CQ1 I am getting valid data at 0x21028800, where can i get valid data for CQ2 ?

Thank you.

Sachidananda

  • Hello ,

    As this concern is a follow up query of your previous thread, I'll forward it to Jitendra. He will get back to you with a response by the end of this week.

     

    Regards,

    Ishita

  • Hi Sachidananda,

    As I replied in other thread- https://e2e.ti.com/support/sensors/f/1023/p/951893/3526791#3526791

    about CQ2 address, this same address is being used by mmWave SDK test application

    C:\ti\mmwave_sdk_03_05_00_01\packages\ti\drivers\cbuff\test\common\test_common.c , where it sets cq2 address offset.

    CQ2 contains RX ADC and IF saturation information when interference happens with the device due to other mmwave sensor in front.

    The analog to digital interface includes a 100 MHz bit stream indicating saturation events in the ADC/IF sections, for each channel. This one-bit indicator for each channel is monitored during the ADC sampling time duration in a time-sliced manner as defined in rlRfRxIfSatMonConfig. If Number of Slices configured in rlRfRxSigImgMonConfig is N, then number of Primary slices = (N+1)/2 and number of secondary slices = (N-1)/2.

    For each time slice, a saturation event count is recorded. This count is the sum of saturation event counts across all RX channels selected for monitoring, capped to a maximum count of 255 (8 bits). 
    CQ data is stored in 16bit format as follows:
    P[1], S[1], P[2] S[2]......P[63], S[63], P[64]
    Where,
    P[n] = indicates the accumulated saturation count for all enabled RX channels in primary slice n
    S[n] = indicates the accumulated saturation count for all enabled RX channels in secondary slice n

    This data is stored in CQ2 section of CQ RAM. If multiple chirps are defined, then this data is concatenated and stored in CQ RAM in ping pong manner

    So just try to make same frequency ramp in front of device which should create interference to the device to fill up this CQ2 memory.

    Regards,

    Jitendra

  • Hi Jitendra,

    I tried using another sensor in front of the sensor generating same frequency ramp and I observed output in the mentioned address location ( EDMA3_DSS_CQ1BUFF_BASE 0x21028200U), but could not able to get any valid results. Should I change any code or add address explicitly to get output in my demo application?

    Thank you

    Sachidananda. 

  • Hello Sachidananda,

    If your intention is to find the interference within the device by using CQ data then in coming week we are going to release an application for interference detection and mitigation. This would help you with your development.

    Regards,

    Jitendra 

  • Hi Jitendra,

    Can you please share the link of the above mentioned release.

    Thank you,

    Sachidananda swamy.

  • Hi Jitendra,

    I am not getting any help from the above mentioned release,I am looking for the RX ADC and IF saturation monitoring information which is stored in CQ2 RAM. I am using  mmwave SDK 3.1.1.2. I am looking for the address of this CQ2 RAM where i can find the monitoring information. The addresses mentioned previously in the thread is also not helping out. Should I add any configuration in the Demo application?

    Thank you

    Sachidananda swamy 

  • Hello Sachidananda,

    I guess all those old replied didn't help you to get the CQ2 data.

    Based on internal team info, address field is same as what I mentioned earlier.

    All the CQ offset is being set using this code snippet in mmw demo (reference)

    cqConfig.cqDataWidth = 0; /* 16bit for mmw demo */
    cqConfig.cq1AddrOffset = MMW_DEMO_CQ_SIGIMG_ADDR_OFFSET; /* CQ1 starts from the beginning of the buffer */
    cqConfig.cq2AddrOffset = MMW_DEMO_CQ_RXSAT_ADDR_OFFSET; /* Address should be 16 bytes aligned */

    retVal = ADCBuf_control(gMmwMssMCB.adcBufHandle, ADCBufMMWave_CMD_CONF_CQ, (void *)&cqConfig);

    But looks like you are not able to see that memory field updated.

    Please provide me few days to do experiment this at end and provide you solution.

    Regards,

    Jitendra

  • Hi Sachidananda,

    I have tried mmwavelink test application on AWR1843BOOST today with a change

    C:\ti\mmwave_sdk_03_05_00_04\packages\ti\control\mmwavelink\test\xwr18xx\main_mss.c:  bool cqDataVerifyTest = true; //false

    First snapshot of CQ-memory offset before triggering the frame 

    Second snapshot with breakpoint within MmwaveLink_VerifyCQData function where you can see CQ2MemLoc and memory getting populated with new data.

    I hope this is sufficient to provide you the CQ2 address and proof that it is getting updated.

    Regards,

    Jitendra