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OPT3001: Interrupt

Part Number: OPT3001

Hi,

Good day. I hope you are doing well.

Our customer is using the OPT3001 and they have an inquiry regarding the interrupt. Kindly refer to the inquiry below.

"When low level interrupt is operating, high level interrupt flow is not. Besides, it generates interrupt when reading lux at 0 level in Auto scale mode. Can you guys explain how to set up interrupt?"

I hope you could help us on this. Thank you.


Regards,

Cedrick

  • He added:

    "Let me explain as follows, when I come to 0 luxe in automatic range determination mode, I read 0 on all registers. Besides, the Latched Window-Style Comparison Mode does not allow me to activate the high limit interruption. My request from you is a configuration that you are sure it works and the ordering of its implementation to registers. The part I've been busy with for a long time is the interrupt part. I would be glad if you could help.

    I have one more question. I know you can read lux reading in interrupt mode to a certain extent, and you have specified it in the datasheet. Is there a solution to this?"

  • Hi Cedrick,

    I do not really understand the questions here. "My request from you is a configuration that you are sure it works and the ordering of its implementation to registers" all the configurations of this device should work per the datasheet. 

    Can you also clarify this question " know you can read lux reading in interrupt mode to a certain extent, and you have specified it in the datasheet. Is there a solution to this?"

    Could you give some details about what the customer is trying to do and their desired functionality and I can help further? This device supports a number of different INT functionality so will need to know the customer requirements.

    Best,

    Alex

  • Hi Alex,

    Thank you for your response. Kindly refer to the explanation of our customer.

    the project is to send an interrupt signal to a processor in the specified lux range and detect the error from the configured register. As far as I read from the datasheet, I did something. but I could not get the cut because of the high limit threshold. My request from you is to explain to me what I have to write in which register in which order in order to understand where I have an error gap in my software and what I should do when the int pin generates an interrupt signal.

    Looking forward for your inputs. Thank you.


    Regards,

    Cedrick

  • Hi Cedrick,

    There are a number of ways to use the INT pin. It sounds the customer is wanting to have the MCU sleep to save power and only wake up when light level is within a threshold. Since they mentioned a range (rather than higher/lower than a specific level) it sounds like the windowed mode would work for them

    "The latched window-style comparison mode is typically selected when using the OPT3001 to interrupt an external processor. In this mode, a fault is recognized when the input signal is above the high-limit register or below the low-limit register"

    The table in the datasheet shows when the INT pin will be active and inactive. Table 2. Latched Window-Style Comparison Mode: Flag Setting and Clearing Summary

    Windowed mode is set by setting the latch field (bit 4) in the config register (register 0x01) to 1. See below explanation from datasheet

    "Latch field (read or write). The latch field controls the functionality of the interrupt reporting mechanisms: the INT pin, the flag high field (FH), and flag low field (FL). This bit selects the reporting style between a latched window-style comparison and a transparent hysteresis-style comparison. [...] 1 = The device functions in latched window-style comparison operation, latching the interrupt reporting mechanisms until a user-controlled clearing event."

    Best,

    Alex

  • Hi Alex,

    Thank you for your response.

    I've got a feedback from our customer.

    "I wanted to know In what order should I use the bits in the configurations register? I'm asking this because I did the interrupt setup written in datasheet and it didn't work."

    Can you please provide us guidance on this? Thank you.


    Regards,

    Cedrick

  • Hi Cedrick,

    Can you send the details of when the customer desires the INT to be active and when inactive? I will need the specifics of what exactly the desired operation is. Can you also provide the current register setting they are using and the behavior they are seeing?

    Best,

    Alex

  • Hi Alex,

    I've just got an update from our customer regarding the settings that they have. Kindly check below.

    "The setting I made in the configuration register for Int is as follows: Configurator reg RN [3: 0] = 0x0, CT = 0x1, M [1: 0] = 0x2, L = 0x1, POL = 0x1, ME = 0x1, FC = 0x2, In the high and low limit registers, I do the data conversion and write in the opposite way of the result register. I am reading the config register every time it enters an interruption. but it doesn't work stably. Besides, because I write low values in the low limit register, it does not enter the End-of-Conversion Mode. An example of an interrupt configuration that I want from you to make sure it works. I know it's a tough job but I really need it. Thank you for your attention"

    Regards,

    Cedrick

  • Hi Cedrick,

    Do you understand the customer issue and can explain it to me? I am seeing three issues/requests in what you quoted, but I am still having trouble with what the customer is wanting from me and how I can help with the details provided.

    - I am reading the config register every time it enters an interruption. but it doesn't work stably - what does this mean by not working stably? Can you provide an example of how it is unstable (data collected from device, scope waveform of INT, etc) 

    - because I write low values in the low limit register, it does not enter the End-of-Conversion Mode. - not sure what the issue is here. Is the customer wanting to use end of conversion mode?

    - An example of an interrupt configuration that I want from you to make sure it works. - I can give the configuration but I need to know how the customer wants to use the device. Please provide step by step of exactly how the customer expects the device to function and then I can provide a configuration to use. I will need a very in depth explanation of device operation expected to be able to suggest a configuration setting. An example is below


    When lux is between 0 lux and 2000 lux the INT pin should be low

    When the lux is greater than 2000 lux the INT pin should be high

    Device should take readings even 800ms

    The MCU will read from the device only when INT pin changes high to low or low to high.

    Best,

    Alex

  • Hi Alex,

    I send you a friendship request. I appreciate your assistance. Thank you.


    Regards,

    Cedrick

  • Hi Cedrick,

    Thanks, I have accepted. Let us continue the conversation there so I will mark this post resolved.

    Best,

    Alex

  • Hi Alex,

    I've received an update from the customer. Can you please check if the information below helps? Thank you.

    This is exactly what I want. It does not make interruptions in a certain lux range (eg 5-35 lux), it creates an interruption when it is out of this range. However, the problem I am experiencing is that although the device exceeds the high limit, it does not cause an interruption, and the device produces it at a low limit. This is what I mean by its unbalanced work. The high limit is not always interrupted. it goes unstable according to its memory. I don't want to use end-of-conversion mode. Which registry did I write what I wrote before? Before the conversion mode ends, it will not be a problem if you specify the configuration and the necessary algorithm that will create interruptions when it falls outside a certain range.
    Let me give an example, the device will work between 0 and 5 lux. It will give interrupt over 5 lux.

    Regards,

    Cedrick

  • Hi Cedrick,

    This is helpful. Will check and follow up this week.

    Best,

    Alex

  • Hi Alex,

    Is there an update on this matter?

    Thank you

    Regards,
    Cedrick

  • Hi Cedrick,

    I will post update today on this.

    Best,
    Alex

  • Hi Alex,

    Good day.

    May we know if there's an update today? Thank you.


    Regards,

    Cedrick

  • Hi Cedrick,

    The end-of-conversion mode is active when the two most significant bits of the threshold low register are set to 11b. Since they do not want INT every conversion these bits cannot be written. Based on the example of int over 5 lux, the device can have low limit 02h set to 0x00 and high limit 03h set to 5lux. In hex this is calculated as 5/0.01=0d500=0x1F4. In the config register the latch field and fault count field will need to be set to the desired operation.

    Best,

    Alex