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PGA411Q1 - EEPROM failure after working reliably for a while.

Other Parts Discussed in Thread: PGA411-Q1

I have been working with the development board PGA411Q1EVM for a few weeks without issues.

I have successfully updated the device's configuration multiple times. I can calculate the EEPROM data CRC which matches the CRC calculated by the device following NRESET or EEPROM Reaload (DEV_CLCRC). Data retention through power and reset cycles has been as expected.

Now the device's EEPROM appears to be failing. The register DEC_CLCRC is always populated with a value of zero and requests to program the EEPROM (following EEPROM Unlock in Diangostic mode) is always rejected (i.e. after setting EECMD to 0xA7 in DEV_EE_CTRL1, reading back EECMD is zero whereas previously the EECMD field would not self clear for some time until the EEPROM bulk programming was complete). In addition, the device is no longer able to read angle & velocity from the resolver. Something that was working reliably before.

Note that the issues I describe can be replicated both when the device is driven in my development environment and when the device is driven by the GUI provided with the evaluation kit.
Using the GUI provided, the following registers values are read out immediately after POR.


;GRID_USER_MEMSPACE
DEV_OVUV1,B689
DEV_OVUV2,0000
DEV_OVUV3,FC09
DEV_OVUV4,07E2
DEV_OVUV5,0000
DEV_OVUV6,010F
DEV_TLOOP_CFG,0514
DEV_AFE_CFG,0000
DEV_PHASE_CFG,1880
DEV_CONFIG1,0000
DEV_CONTROL1,0000
DEV_CONTROL2,0000
DEV_CONTROL3,0003
DEV_STAT1,0000
DEV_STAT2,0051
DEV_STAT3,0000
DEV_STAT4,0004
DEV_STAT5,02A4
DEV_STAT6,7E00
DEV_STAT7,004B
DEV_CLCRC,0000
DEV_CRC,0000
CRCCALC,00FF
DEV_EE_CTRL1,0000
DEV_CRC_CTRL1,0000
DEV_EE_CTRL4,0000
DEV_UNLK_CTRL1,0000
EOF

I am confident the board has not been damaged electrically, but it is possible that the device was reset whilst in a middle of an EEPROM bulk programming operation, though I cannot say for sure.
Could this be a reason for the loss of EEPROM functionality (note that FCECRC and FTECRC bits aren't set)?


Thanks

  • Hello,

    Thank you for the info. What the order of steps are you taking when trying to program the EEPROM?

    This thread has the steps on how to program EEPROM using the GUI: https://e2e.ti.com/support/data-converters/f/data-converters-forum/728325/pga411-q1-pga411-q1-pga411-eeprom-read-and-write-problems?tisearch=e2e-sitesearch&keymatch=PGA411%252520EEPROM

    I am not sure if a device could be reset in the middle of EEPROM bulk programming that is something I would have to look into, but do you have another PGA411-Q1 that you are able to test? If its having similar symptoms then it could be something in the setup. This could help determine if something did occur to the device you are currently using.

    Best,

    Isaac

  • Hi Isaac, thank you for your reply.
    The steps followed to program the EEPROM are:

    . Enter Diagnostic Mode
    . Write EEPROM backed-up Registers (OVUV1, etc.)
    . Unlock EEPROM
    . Issue EEPROM Bulk Programming command
    . Wait for EECMD bit-filed to self clear
    . Issue an EEPROM Load command
    . Wait for EECMD bit-field to self clear
    . Read DEV_CLCCR
    . Compare DEV_CLCRC with value calculated by host, expect match.
    . Exit diagnostic mode

    Note that this sequence has been working reliably until recently.
    Currently the value read out from DEV_CLCRC is always zero and the values written to EEPROM are lost following a power cycle.

    Please also note that the EEPROM on this device has been reprogrammed numerous times at ambien temperature.
    I cannot comment on whether I may have reached the erase cycle limit recommended for this device, since this information is not provided in the datasheet or the safety manual.

    Unfortunately I only have one PGA411Q1 board which we purchased for about £100. 
    Distributors are currently asking for 10000£ which is very unreasonable and, quite honestly, alarming.

    I will try to get the board repaired by replacing the IC, but you can imagine this failure has raised concerns, considering the IC is meant to go into a safety critical product.

    I have a few more questions, if you don't mind:

    Do you know what the route to get TI to investigate the root cause of the failure is?

    Is loss of power / reset during bulk programming a potential cause for the device to fail without the possibility of being recovered? I.e. would TI recommend against EEPROM bulk programming outside a controlled, production environment?

    Can you share any information on what the recommended erase cycle limit for the device, and temperature range.

    Can you provide any information on how the EEPROM is managed internally by the device? 

    What can cause the device to fail to update the DEV_CLCRC register (following a POR and/or following any EEPROM operations, including Load)?

    Thanks

  • Hello,

    Thank you for taking to listing out all the steps. I will need some time to take all the information you have provided and consult with the team. I will get back to you as soon as I have a response on the concerns and questions you have. Thank you for your patience.

    Best,

    Isaac

  • Hello,

    This is now a custom product covered by NDA, I have reached out to the field for further assistance but I will also reach out to you via private message.

    Best,

    Isaac

  • Hi Issac,

    It seems that there is already an NDA in place between TI and my organization.
    With this in mind, is there any chance to follow up with the field engineer you contacted last week?

    I am keen to understand what may have happened to this part.

    Thanks.

  • Hello,

    I have sent you a private message. I will be closing this thread, if you have any questions feel free to reach out to me privately or post a new question. Thank you.

    Best,

    Isaac