I have been working with the development board PGA411Q1EVM for a few weeks without issues.
I have successfully updated the device's configuration multiple times. I can calculate the EEPROM data CRC which matches the CRC calculated by the device following NRESET or EEPROM Reaload (DEV_CLCRC). Data retention through power and reset cycles has been as expected.
Now the device's EEPROM appears to be failing. The register DEC_CLCRC is always populated with a value of zero and requests to program the EEPROM (following EEPROM Unlock in Diangostic mode) is always rejected (i.e. after setting EECMD to 0xA7 in DEV_EE_CTRL1, reading back EECMD is zero whereas previously the EECMD field would not self clear for some time until the EEPROM bulk programming was complete). In addition, the device is no longer able to read angle & velocity from the resolver. Something that was working reliably before.
Note that the issues I describe can be replicated both when the device is driven in my development environment and when the device is driven by the GUI provided with the evaluation kit.
Using the GUI provided, the following registers values are read out immediately after POR.
;GRID_USER_MEMSPACE
DEV_OVUV1,B689
DEV_OVUV2,0000
DEV_OVUV3,FC09
DEV_OVUV4,07E2
DEV_OVUV5,0000
DEV_OVUV6,010F
DEV_TLOOP_CFG,0514
DEV_AFE_CFG,0000
DEV_PHASE_CFG,1880
DEV_CONFIG1,0000
DEV_CONTROL1,0000
DEV_CONTROL2,0000
DEV_CONTROL3,0003
DEV_STAT1,0000
DEV_STAT2,0051
DEV_STAT3,0000
DEV_STAT4,0004
DEV_STAT5,02A4
DEV_STAT6,7E00
DEV_STAT7,004B
DEV_CLCRC,0000
DEV_CRC,0000
CRCCALC,00FF
DEV_EE_CTRL1,0000
DEV_CRC_CTRL1,0000
DEV_EE_CTRL4,0000
DEV_UNLK_CTRL1,0000
EOF
I am confident the board has not been damaged electrically, but it is possible that the device was reset whilst in a middle of an EEPROM bulk programming operation, though I cannot say for sure.
Could this be a reason for the loss of EEPROM functionality (note that FCECRC and FTECRC bits aren't set)?
Thanks