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IWR6843AOP: DSP power management

Part Number: IWR6843AOP

Hi,

The xwr64xxAOP_mmw_demo does not use the DSP core of the IWR6843AOP chip. I'm looking into ways for decreasing the power consumption of the chip. The reference manual says that power consumption can be reduced by switching off the DSP power domain. The software initializes the SOC driver with SOC_DSSCfg_HALT setting, so the DSP is not unhalted. However, when I read DSS_REG.GEMPWRSMCFG3.PWRSMMODESTATUS I can see that GEM status is 1 (i.e. transitioning from OFF to ON) instead of 0 (OFF). If I follow the instructions in the manual about how to switch off the power domain, the PWRSMMODESTATUS goes to 2 (i.e. transitioning from ON to OFF). If I unhalt the DSP (with SOC_DSSCfg_UNHALT) the power consumption actually goes down a bit (~10%). How can I ensure the DSP is really powered down and its power consumption is minimized?

Regards,

Juha

  • Hi Juha

    Can you please share the register sequence you are following? Also are you performing this on MSS or DSS side?

    Regards,

    AG

  • Hi

    I'm using the xwr64xxAOP_mmw_demo software. It does not build an image for the DSS so the DSS does not execute anything. In the beginning of main() the SOC is initialized with:

    --

    /* Populate the SOC configuration: */
    socCfg.clockCfg = SOC_SysClock_INIT;
    socCfg.dssCfg = SOC_DSSCfg_HALT;
    socCfg.mpuCfg = SOC_MPUCfg_CONFIG;

    /* Initialize the SOC Module: This is done as soon as the application is started
    * to ensure that the MPU is correctly configured. */
    socHandle = SOC_init (&socCfg, &errCode);

    --

    When I run the following (in the MSS side), it will keep printing 1 indicating GEM status is 1 or in other words the DSS is transitioning from OFF to ON.

    --

    while (1) {
    uint32_t powerStatus = CSL_FEXTR(ptrSOCDriverMCB->ptrDSSRegs->GEMPWRSMCFG3, 19U, 18U);
    sprintf(buf, "%u\r\n", powerStatus);
    UART_writePolling(gMmwMCB.commandUartHandle, (uint8_t*)buf, strlen(buf));
    SOC_microDelay(100000);
    }

    --

    If I unhalt the DSP by changing the SOC configuration from SOC_DSSCfg_HALT to SOC_DSSCfg_UNHALT, the power consumption goes down and that loop will print 3 indicating the DSS is ON.

    - Juha

  • Hi Juha

    It seems you are only performing DSS Clock gating/halting. Are you performing any of the other steps regarding DSP Power Domain Shutdown as outline in Technical Reference Manual?

    Regards,

    AG

  • Hi,

    The Technical Reference Manual is not entirely clear how the operation should be done. I've tried the following sequence:

    // step 3: Set the DSS_REG.GEMPWRSMCFG4.PWRSMLRSTHALT bit to 0x0
    ptrSOCDriverMCB->ptrDSSRegs->GEMPWRSMCFG4 &= ~(1<<17); 
    // step 6: Mask all interrupts from DSP by setting the DSS_REG.GEMPWRSMCFG4.GEMEVENTMASK field to
    0x1.
    ptrSOCDriverMCB->ptrDSSRegs->GEMPWRSMCFG4 |= (1<<18);
    // step 7: Trigger a power down by setting the DSS_REG.GEMPWRSMCFG4.PWRSMSLEEPTRIG field to 0x1
    ptrSOCDriverMCB->ptrDSSRegs->GEMPWRSMCFG4 |= (1<<16);

    After this the PWRSMMODESTATUS goes to 2 (i.e. transitioning from ON to OFF), but the power consumption is not affected.

    What is the correct sequence to ensure the DSP is powered off?

    - Juha

  • Hi Juha

    I am going to look into providing a full sequence for you that performs shutdown to the DSP Power Domain. Please allow several days for a response.

    Regards,

    AG

  • Hi Juha

    I am still looking into this

    Regards,

    AG