TIDEP-01012: How to control txEnable at each RF chip and burst when forceProfile is 1 in advance frame.

How to control txEnable at each RF chip and burst when forceProfile is 1 in advance frame.

Under PROCESSOR_SDK_RADAR environment, I want to use the cascade radar at each antenna transmits FMCW successively, one by one.

So, I set forceProfile 1 in advance frame.

But I’m not sure that how to control txEnable at each RF chip and burst when forceProfile is 1 in advance frame.

Is my understanding correct?

Concrete image what I want is as follows.

Burst 1: chirp 0 at tx0 at RF chip 0.

Burst 1: chirp 1 at tx0 at RF chip 0.

…………

Burst 1: chirp 255 at tx0 at RF chip 0.

Burst 2: chirp 0 at tx0 at RF chip 1.

Burst 2: chirp 1 at tx0 at RF chip 1.

…………

Burst 2: chirp 255 at tx0 at RF chip 1.

Burst 3: chirp 0 at tx0 at RF chip 2.

Burst 3: chirp 1 at tx0 at RF chip 2.

…………

Burst 3: chirp 255 at tx0 at RF chip 2.

Burst 4: chirp 0 at tx0 at RF chip 3.

Burst 4: chirp 1 at tx0 at RF chip 3.

…………

Burst 4: chirp 255 at tx0 at RF chip 3.

Plan.

Bsp_Ar12xxConfigObj.chirpCfgArgs can work when forceProfile is 1 in advance frame.

So, first I should guess ARRAY_SIZE1 when forceProfile is 1 in advance frame.

I allocate the array of chirp.

rlChirpCfg_t   gChains_cascadeRadarChirpCfgArgs1[ARRAY_SIZE1]

I set pointer.

Bsp_Ar12xxConfigObj.chirpCfgArgs      = gChains_cascadeRadarChirpCfgArgs1

After that, I address txEnable at each chirp.

gChains_cascadeRadarChirpCfgArgs1[0].chirpStartIdx=0;

gChains_cascadeRadarChirpCfgArgs1[0].chirpEndIdx=255;

gChains_cascadeRadarChirpCfgArgs1[0].profileId=0;

gChains_cascadeRadarChirpCfgArgs1[0].txEnable=1;

gChains_cascadeRadarChirpCfgArgs1[1].chirpStartIdx=256;

gChains_cascadeRadarChirpCfgArgs1[1].chirpEndIdx=511;

gChains_cascadeRadarChirpCfgArgs1[1].profileId=0;

gChains_cascadeRadarChirpCfgArgs1[1].txEnable=0;

gChains_cascadeRadarChirpCfgArgs1[2].chirpStartIdx=511;

gChains_cascadeRadarChirpCfgArgs1[2].chirpEndIdx=767;

gChains_cascadeRadarChirpCfgArgs1[2].profileId=0;

gChains_cascadeRadarChirpCfgArgs1[2].txEnable=0;

gChains_cascadeRadarChirpCfgArgs1[3].chirpStartIdx=768;

gChains_cascadeRadarChirpCfgArgs1[3].chirpEndIdx=1023;

gChains_cascadeRadarChirpCfgArgs1[3].profileId=0;

gChains_cascadeRadarChirpCfgArgs1[3].txEnable=0;

gChains_cascadeRadarChirpCfgArgs2[0].chirpStartIdx=0;

gChains_cascadeRadarChirpCfgArgs2[0].chirpEndIdx=255;

gChains_cascadeRadarChirpCfgArgs2[0].profileId=0;

gChains_cascadeRadarChirpCfgArgs2[0].txEnable=0;

gChains_cascadeRadarChirpCfgArgs2[1].chirpStartIdx=256;

gChains_cascadeRadarChirpCfgArgs2[1].chirpEndIdx=511;

gChains_cascadeRadarChirpCfgArgs2[1].profileId=0;

gChains_cascadeRadarChirpCfgArgs2[1].txEnable=1;

gChains_cascadeRadarChirpCfgArgs2[2].chirpStartIdx=511;

gChains_cascadeRadarChirpCfgArgs2[2].chirpEndIdx=767;

gChains_cascadeRadarChirpCfgArgs2[2].profileId=0;

gChains_cascadeRadarChirpCfgArgs2[2].txEnable=0;

gChains_cascadeRadarChirpCfgArgs2[3].chirpStartIdx=768;

gChains_cascadeRadarChirpCfgArgs2[3].chirpEndIdx=1023;

gChains_cascadeRadarChirpCfgArgs2[3].profileId=0;

gChains_cascadeRadarChirpCfgArgs2[3].txEnable=0;

gChains_cascadeRadarChirpCfgArgs3[0].chirpStartIdx=0;

gChains_cascadeRadarChirpCfgArgs3[0].chirpEndIdx=255;

gChains_cascadeRadarChirpCfgArgs3[0].profileId=0;

gChains_cascadeRadarChirpCfgArgs3[0].txEnable=0;

gChains_cascadeRadarChirpCfgArgs3[1].chirpStartIdx=256;

gChains_cascadeRadarChirpCfgArgs3[1].chirpEndIdx=511;

gChains_cascadeRadarChirpCfgArgs3[1].profileId=0;

gChains_cascadeRadarChirpCfgArgs3[1].txEnable=0;

gChains_cascadeRadarChirpCfgArgs3[2].chirpStartIdx=511;

gChains_cascadeRadarChirpCfgArgs3[2].chirpEndIdx=767;

gChains_cascadeRadarChirpCfgArgs3[2].profileId=0;

gChains_cascadeRadarChirpCfgArgs3[2].txEnable=1;

gChains_cascadeRadarChirpCfgArgs3[3].chirpStartIdx=768;

gChains_cascadeRadarChirpCfgArgs3[3].chirpEndIdx=1023;

gChains_cascadeRadarChirpCfgArgs3[3].profileId=0;

gChains_cascadeRadarChirpCfgArgs3[3].txEnable=0;

gChains_cascadeRadarChirpCfgArgs4[0].chirpStartIdx=0;

gChains_cascadeRadarChirpCfgArgs4[0].chirpEndIdx=255;

gChains_cascadeRadarChirpCfgArgs4[0].profileId=0;

gChains_cascadeRadarChirpCfgArgs4[0].txEnable=0;

gChains_cascadeRadarChirpCfgArgs4[1].chirpStartIdx=256;

gChains_cascadeRadarChirpCfgArgs4[1].chirpEndIdx=511;

gChains_cascadeRadarChirpCfgArgs4[1].profileId=0;

gChains_cascadeRadarChirpCfgArgs4[1].txEnable=0;

gChains_cascadeRadarChirpCfgArgs4[2].chirpStartIdx=511;

gChains_cascadeRadarChirpCfgArgs4[2].chirpEndIdx=767;

gChains_cascadeRadarChirpCfgArgs4[2].profileId=0;

gChains_cascadeRadarChirpCfgArgs4[2].txEnable=0;

gChains_cascadeRadarChirpCfgArgs4[3].chirpStartIdx=768;

gChains_cascadeRadarChirpCfgArgs4[3].chirpEndIdx=1023;

gChains_cascadeRadarChirpCfgArgs4[3].profileId=0;

gChains_cascadeRadarChirpCfgArgs4[3].txEnable=1;

// forceProfile image

// just use 1 sub-frame. Set conf at each RF chip
advFrameCfg1->frameSeq.subFrameCfg[0].forceProfileIdx = 0;
advFrameCfg1->frameSeq.subFrameCfg[0].chirpStartIdx = 0;
advFrameCfg1->frameSeq.subFrameCfg[0].numOfChirps =1;
advFrameCfg1->frameSeq.subFrameCfg[0].numLoops = 256;
advFrameCfg1->frameSeq.subFrameCfg[0].numOfBurst = 4;
advFrameCfg1->frameSeq.subFrameCfg[0].numOfBurstLoops = 1;
advFrameCfg1->frameSeq.subFrameCfg[0].chirpStartIdxOffset= 0;
advFrameCfg1->frameSeq.subFrameCfg[0].burstPeriodicity = 2400000; //
advFrameCfg1->frameSeq.subFrameCfg[0].subFramePeriodicity= 2400000; //

advFrameCfg2->frameSeq.subFrameCfg[0].forceProfileIdx = 0;
advFrameCfg2->frameSeq.subFrameCfg[0].chirpStartIdx = 0;
advFrameCfg2->frameSeq.subFrameCfg[0].numOfChirps =1;
advFrameCfg2->frameSeq.subFrameCfg[0].numLoops = 256;
advFrameCfg2->frameSeq.subFrameCfg[0].numOfBurst = 4;
advFrameCfg2->frameSeq.subFrameCfg[0].numOfBurstLoops = 1;
advFrameCfg2->frameSeq.subFrameCfg[0].chirpStartIdxOffset= 0;
advFrameCfg2->frameSeq.subFrameCfg[0].burstPeriodicity = 2400000; //
advFrameCfg2->frameSeq.subFrameCfg[0].subFramePeriodicity= 2400000; //

advFrameCfg3->frameSeq.subFrameCfg[0].forceProfileIdx = 0;
advFrameCfg3->frameSeq.subFrameCfg[0].chirpStartIdx = 0;
advFrameCfg3->frameSeq.subFrameCfg[0].numOfChirps =1;
advFrameCfg3->frameSeq.subFrameCfg[0].numLoops = 256;
advFrameCfg3->frameSeq.subFrameCfg[0].numOfBurst = 4;
advFrameCfg3->frameSeq.subFrameCfg[0].numOfBurstLoops = 1;
advFrameCfg3->frameSeq.subFrameCfg[0].chirpStartIdxOffset= 0;
advFrameCfg3->frameSeq.subFrameCfg[0].burstPeriodicity = 2400000; //
advFrameCfg3->frameSeq.subFrameCfg[0].subFramePeriodicity= 2400000; //

advFrameCfg4->frameSeq.subFrameCfg[0].forceProfileIdx = 0;
advFrameCfg4->frameSeq.subFrameCfg[0].chirpStartIdx = 0;
advFrameCfg4->frameSeq.subFrameCfg[0].numOfChirps =1;
advFrameCfg4->frameSeq.subFrameCfg[0].numLoops = 256;
advFrameCfg4->frameSeq.subFrameCfg[0].numOfBurst = 4;
advFrameCfg4->frameSeq.subFrameCfg[0].numOfBurstLoops = 1;
advFrameCfg4->frameSeq.subFrameCfg[0].chirpStartIdxOffset= 0;
advFrameCfg4->frameSeq.subFrameCfg[0].burstPeriodicity = 2400000; //
advFrameCfg4->frameSeq.subFrameCfg[0].subFramePeriodicity= 2400000; //