Hello team,
I received inquiry about SOPx Implementation. According to xWR1843BOOT schematic(https://www.ti.com/lit/zip/sprr370 ), many resistors are implemented, as you know.
Are following resistors really required when setting SOP with switch S1?
R98,R99,R114, R113,R96,R95, R89,R88,R92
I checked “xWR1843BOOT Hardware Design Checklist (https://www.ti.com/lit/zip/spracl2 ), I noticed the following descriptions.
1) SOP0 (pin# J1) : Pull to VIO via 10K resister
2) SOP1 (pin# P11): Pull to GND via 10K resister. 3) Ability to pull it to VIO for debug.
3) SOP2 (pin# P13): Pull to GND via 10K resister. Ability to pull it to VIO for flashing.
To avoid miss, Could you elaborate this implementation, please?
A quick response is appreciated!
Best regards,
Miyazaki