SN74LVC1G3157: Cio(on) and Cio(off)

ttd

Part Number: SN74LVC1G3157

Tool/software:

Dear Technical Support Team,

Where is the following capacitance Cio(on) and Cio(off) for SN74LVC1G3157 and where is it between?
I think the three places are simplified, but I would like to know in what proportion they are parasitic.

・Between Bn pin and GND
・Between An pin and GND
・Between the switch connecting Bn and An (like the capacitance between Drain and Source of FET)

If possible, could you please fill in the corresponding part in the Block Diagram?

Best Reagrds,

ttd

6 months ago

0 Clemens Ladisch 6 months ago

Guru 317260 points

It is measured at the pin against GND.

(A FET would not have a separate GND pin.)

0 akihisa wakebe 6 months ago in reply to Clemens Ladisch

Prodigy 40 points

Could you please tell me about a simple equivalent circuit under the condition that the Bn terminal and A terminal are connected?

For example, in the case of equivalence like the following, please tell me the values of C1 and C2.

0 Rami Mooti1 6 months ago in reply to akihisa wakebe

TI__Mastermind 35628 points

Hi Akihisa,

Typically for simulation purposes we would say C1 and C2 are 1/2 CON each. That would hold pretty consistent for a 1:1 switch but in reality you would likely see a little more on the drain side for a x:1 switch since there's a little more conductor space on the drain side. So for this device the A side would have slightly higher CON. For example, you could say 10pF for A and 7pF for B1 here.
Coff would be the same for source and drain. So using your same equivalent model, C1 and C2 would be 5pF and your RON would be a very large impedance.

Thanks,
Rami

0 akihisa wakebe 6 months ago in reply to Rami Mooti1

Prodigy 40 points

Hi Rami,

thank you for your advices.

Best Regards,

A.Wakebe/TED

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SN74LVC1G3157: Cio(on) and Cio(off)