• State Resolved
  • Locked Locked
  • Replies 9 replies
  • Answers 2 answers
  • Subscribers 16 subscribers
  • Views 289 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMUX154E: drop

Jeff YANG
Mastermind 7755 points
Part Number: TMUX154E

Tool/software:

Hi,

I would like to consult about an issue with TI's Switch TMUX154E. There are two problems:

  1. During power-on, when the switch toggles, a very short drop of approximately 20ns is observed on Port A/B.
  2. During power-on/off, when the switch toggles, a longer and less severe drop is observed on Port A/B, which appears to be related to the VDD slew rate.

Schematic as below.

The circuit configuration is as follows:

  1. Port A/B has a constant pull-up OD signal.
  2. Port A1/B1 is an OD type without pull-up IO.
  3. Port A0/B0 is a PP type, with an internal pull-up diode to P_1V8 inside our IC.
  4. Power-on sequence: P_VIN_3V3 rises to 2.7V first, and after 3ms, P_1V8 begins to rise.
  5. Power-off sequence: P_VIN_3V3 drops to 2.7V, and P_1V8 is turned off.

Question 1: Is the drop caused by the I3C SW being powered, and when SEL switches from 0 to 1, Port A1/B1 is floating, causing Port A/B to charge Port A1/B1, resulting in a brief drop? Or is it due to a momentary effect during the internal switching of the SW that causes this drop?

Question 2: During power on/off, when VDD and SEL drop simultaneously, a longer and less severe drop is observed on Port A/B. We tested different VIN slew rates, and the duration of the drop varies accordingly, appearing to be related to the VDD slew rate. Is this drop related to the behavior of the switch?
Thanks!
Jeff
  • 0
    TI__Mastermind 35168 points

    Hi Jeff,

    Is this affecting the performance of the part or is this more out of curiosity? 

    It likely is happening because when the switch turns on or off, the loading momentarily changes as the internal FETs switch. So it's more of the first hypothesis you have in question 1. But at the same time, it may also be because of the timing of the switching. There is a break before make mechanism in the switch so when you switch it there is a small moment of time that the switch is floating before it reconnects. So that may also be what you're seeing. It's difficult to tell though from just one test condition with on screenshot. 
    If the main question though is if this is an issue with the switch or normal behavior, I would say this isn't something to be concerned with and is normal. 
    now if it's causing some issue, then maybe we can discuss how to resolve it (likely a large capacitive loading). 

    As for when you're powering down, I think this would be some internal mechanism timing reacting slower. You sort of hover in some middle logic state that may be causing the switch to keep the switch floating for a moment before connecting again.

    Thanks,
    Rami

  • 0 in reply to Rami Mooti1
    Mastermind 7755 points

    Hi Rami,

    1. Un-expected low signal make a START bit on SMBus, host would keep waiting for the next action. And we want SMBus keep high all the time.
    2. A small moment of time that switch is floating before it reconnect

      => If port A/B is at 1.8V, what would port A/B happen when switch is floating? The duration is specify in ton (max 30ns), right?

    3. You sort of hover in some middle logic state that may be causing the switch to keep the switch floating for a moment before connecting again.

                => Is this same mechanism in a small moment of time? But the duration is correlative with slew rate on VDD, that’s more than ton (max 30ns). Can                          you explain more?

    Thanks for your reply. If the data is insufficient, we will provide it ASAP.

    Jeff

  • +1 in reply to Jeff YANG
    TI__Mastermind 35168 points

    Hi Jeff,

    1. But it's only dipping in the mV range. That shouldn't be enough to trigger the logic level low. Is it something they're currently seeing actually happen or are they just worried about it? What is the voltage thresholds for logic high and logic low? 

    2. Sort of. The Ton timing spec is measured from when the logic is at 50% and the signal on the switch gets up to 90%. This will be partially the amount of time you're floating and partially how long it takes the signal to get actually up to 90%, so the load will also impact it. So the time you're floating will be likely shorter but there will be load considerations for how much it dips and how fast it recovers.

    3. I'm not sure I follow what the question is. The dip you shared is 18ns. Is there a scenario that is longer that wasn't discussed?
    I talked to my design team about this to see if we can get a specific answer as to why it is associated with the supply and the feedback is that it's normal behavior that is likely associated with the charge pump and drivers internally that activate during power down/up.

    -Rami

  • 0 in reply to Rami Mooti1
    Mastermind 7755 points

    Hi Rami,

    We have WA Solution but need your confirm, plz refer as below.

    Power on

    Power off

    1. OE is PU by 3.3V power source and connect to OD Type signal #PLA. In the scenario, could TMUX154E be disabled during power on/off?

    Thanks!

    Jeff

  • 0 in reply to Jeff YANG
    TI__Mastermind 35168 points

    Hi Jeff, 

    I'm not sure I follow the question here. Are you saying that you're pulling up the TMUX154E enable pin during operation and it is resolving the problem? That method is totally fine to do. I'm not sure what you're asking though with "Could TMUX154E be disabled during power on/off"? If the question is just whether doing that is allowed, yes, that is allowed

    Thanks,
    Rami

  • 0 in reply to Rami Mooti1
    Mastermind 7755 points

    Hi Rami,

    To make sure there is no any drop on Port A. We need your confirm that “OE tied with VCC” could disable TMUX154E during power on/off. We had experiment for 3pcs and it’s works, but need your confirm for the risk. thanks!

  • 0 in reply to Jeff YANG
    TI__Mastermind 35168 points

    Hi Jeff,

    There isn't a risk of having the EN pin pulled high during power up. We actually recommend that they are pulled up to VCC or down to GND in general (section 9.2.1). 
    Can you provide context to the image you keep sharing? Is the dip that happens ~3ms after power up expected? or is that an issue? I'm just not sure what you're trying to show me with that.

    Thanks,
    Rami

  • 0 in reply to Rami Mooti1
    Mastermind 7755 points

    Hi Rami,

    There isn't a risk of having the EN pin pulled high during power up. We actually recommend that they are pulled up to VCC or down to GND in general (section 9.2.1). 

    => Can you explain more for section 9.2.1? SEL & EN be pulled up to VCC could keep TMUX154E being disable during power on/off, right?

    Can you provide context to the image you keep sharing? Is the dip that happens ~3ms after power up expected? or is that an issue? I'm just not sure what you're trying to show me with that. Thanks!

    => It’s an issue. In the worst case, we measured 3.1897us and level is under the VIHmin (1.35V in SMBus 3.1 spec.). Since it fall into the unknow level, we can’t gurantee host would trigger low or not

    Thanks!

    Jeff

  • 0 in reply to Jeff YANG
    TI__Mastermind 35168 points

    Hi Jeff,

    I think maybe there was a misunderstanding. I understand the context of the initial issue. My question for context was specifically about this image:  

    You shared this image. Was it just to show the bus looked fine? What is happening on the yellow Enable pin though. It looks strange to be switching voltage levels like that. 

    The worst condition you showed that had the large drop would technically be violating the datasheet. You aren't supposed to ramp up the control pin before the supply:




    Jeff YANG said:
    Can you explain more for section 9.2.1? SEL & EN be pulled up to VCC could keep TMUX154E being disable during power on/off, right?

    I understood your question as whether it's okay to pull up to VCC. I understand you're asking if it will disable the channel during powerup, correct? Yes it should. When EN/ is high the device is disconnected.
    In this image though it looks like your OE is pulled high (Assuming OE is the TMUX154E EN pin) but the SDA and SCL look to be still high. Is this on the designated output side of the mux or are you probing the inputs?

    -Rami