Hi,
I am running simulation on CPSW_RGMII1 lines of AM64x EVM board (PROC101D). Since the RX lines are connecting between switch and SoC, I have generated the RLC package of the Mux and RC values as per the data sheet of TS3DDR3812RUAR.
Below is the complete RLC package of TS3DDR3812RUAR Mux, kindly validate and let me know is this all correct to proceed with further simulations process.
*---------------------
* Mux Pacakge RLC
*---------------------
*2 A0 TS3DDR3812_A_33 1.290e-01 2.862e-09 3.263e-13
R_SIG000 PADfar_SW75_PRG0_PRU1_GPO7 Mux_Int_PADFAR_SIG0 0.129
C_SIG000 Mux_Int_PADFAR_SIG0 VSS 0.3263pF
L_SIG000 Mux_Int_PADFAR_SIG0 SW75_PRG0_PRU1_GPO7 2.862nH
*RC Circuit rON = 8E Typ CON = 5.6 pF Typ
R_SIG00 PADfar_SW75_PRG0_PRU1_GPO7 PADfar_SW75_PRG0_PRU1_GPO7_IN 8.0
C_SIG00 PADfar_SW75_PRG0_PRU1_GPO7_IN VSS 5.6pF
*41 B0 TS3DDR3812_BC_33 1.299e-01 2.881e-09 2.983e-13
R_SIG001 PADfar_SW75_PRG0_PRU1_GPO7_IN Mux_Int_PADFAR_SIG1 0.1299
C_SIG001 Mux_Int_PADFAR_SIG1 VSS 0.2983pF
L_SIG001 Mux_Int_PADFAR_SIG1 SW75_CPSW_RGMII1_RD0 2.881nH
*42 C0 TS3DDR3812_BC_33 1.372e-01 3.156e-09 3.567e-13
R_SIG002 PADfar_SW75_PRG0_PRU1_GPO7_IN Mux_Int_PADFAR_SIG2 0.1372
C_SIG002 Mux_Int_PADFAR_SIG2 VSS 0.3567pF
L_SIG002 Mux_Int_PADFAR_SIG2 SW75_HSE_PRG0_PRU1_GPO7 3.156nH
*3 A1 TS3DDR3812_A_33 1.158e-01 2.549e-09 3.115e-13
R_SIG003 PADfar_SW75_PRG0_PRU1_GPO9 Mux_Int_PADFAR_SIG3 0.1158
C_SIG003 Mux_Int_PADFAR_SIG3 VSS 0.3115pF
L_SIG003 Mux_Int_PADFAR_SIG3 SW75_PRG0_PRU1_GPO9 2.549nH
*RC Circuit rON = 8E Typ CON = 5.6 pF Typ
R_SIG01 PADfar_SW75_PRG0_PRU1_GPO9 PADfar_SW75_PRG0_PRU1_GPO9_IN 8.0
C_SIG01 PADfar_SW75_PRG0_PRU1_GPO9_IN VSS 5.6pF
*39 B1 TS3DDR3812_BC_33 1.372e-01 3.154e-09 3.573e-13
R_SIG004 PADfar_SW75_PRG0_PRU1_GPO9_IN Mux_Int_PADFAR_SIG4 0.1372
C_SIG004 Mux_Int_PADFAR_SIG4 VSS 0.3573pF
L_SIG004 Mux_Int_PADFAR_SIG4 SW75_CPSW_RGMII1_RD1 3.154nH
*40 C1 TS3DDR3812_BC_33 1.299e-01 2.879e-09 2.983e-13
R_SIG005 PADfar_SW75_PRG0_PRU1_GPO9_IN Mux_Int_PADFAR_SIG5 0.1299
C_SIG005 Mux_Int_PADFAR_SIG5 VSS 0.2983pF
L_SIG005 Mux_Int_PADFAR_SIG5 SW75_HSE_PRG0_PRU1_GPO9 2.879nH
*4 A2 TS3DDR3812_A_33 1.029e-01 2.247e-09 2.774e-13
R_SIG006 PADfar_SW75_PRG0_PRU1_GPO10 Mux_Int_PADFAR_SIG6 0.1029
C_SIG006 Mux_Int_PADFAR_SIG6 VSS 0.2774pF
L_SIG006 Mux_Int_PADFAR_SIG6 SW75_PRG0_PRU1_GPO10 2.247nH
*RC Circuit rON = 8E Typ CON = 5.6 pF Typ
R_SIG02 PADfar_SW75_PRG0_PRU1_GPO10 PADfar_SW75_PRG0_PRU1_GPO10_IN 8.0
C_SIG02 PADfar_SW75_PRG0_PRU1_GPO10_IN VSS 5.6pF
*38 B2 TS3DDR3812_BC_33 1.356e-01 3.015e-09 3.026e-13
R_SIG007 PADfar_SW75_PRG0_PRU1_GPO10_IN Mux_Int_PADFAR_SIG7 0.1356
C_SIG007 Mux_Int_PADFAR_SIG7 VSS 0.3026pF
L_SIG007 Mux_Int_PADFAR_SIG7 SW75_CPSW_RGMII1_RD2 3.015nH
*37 C2 TS3DDR3812_BC_33 1.225e-01 2.700e-09 3.136e-13
R_SIG008 PADfar_SW75_PRG0_PRU1_GPO10_IN Mux_Int_PADFAR_SIG8 0.1225
C_SIG008 Mux_Int_PADFAR_SIG8 VSS 0.3136pF
L_SIG008 Mux_Int_PADFAR_SIG8 SW75_HSE_PRG0_PRU1_GPO10 2.70nH
*5 A3 TS3DDR3812_A_33 9.101e-02 1.968e-09 2.469e-13
R_SIG009 PADfar_SW75_PRG0_PRU1_GPO17 Mux_Int_PADFAR_SIG9 0.09101
C_SIG009 Mux_Int_PADFAR_SIG9 VSS 0.2469pF
L_SIG009 Mux_Int_PADFAR_SIG9 SW75_PRG0_PRU1_GPO17 1.968nH
*RC Circuit rON = 8E Typ CON = 5.6 pF Typ
R_SIG03 PADfar_SW75_PRG0_PRU1_GPO17 PADfar_SW75_PRG0_PRU1_GPO17_IN 8.0
C_SIG03 PADfar_SW75_PRG0_PRU1_GPO17_IN VSS 5.6pF
*36 B3 TS3DDR3812_BC_33 1.115e-01 2.440e-09 2.898e-13
R_SIG010 PADfar_SW75_PRG0_PRU1_GPO17_IN Mux_Int_PADFAR_SIG10 0.1115
C_SIG010 Mux_Int_PADFAR_SIG10 VSS 0.2898pF
L_SIG010 Mux_Int_PADFAR_SIG10 SW75_CPSW_RGMII1_RD3 2.440nH
*35 C3 TS3DDR3812_BC_33 1.002e-01 2.174e-09 2.611e-13
R_SIG011 PADfar_SW75_PRG0_PRU1_GPO17_IN Mux_Int_PADFAR_SIG11 0.1002
C_SIG011 Mux_Int_PADFAR_SIG11 VSS 0.2611pF
L_SIG011 Mux_Int_PADFAR_SIG11 SW75_PRG0_PRU1_GPO17 2.174nH
*6 A4 TS3DDR3812_A_33 8.034e-02 1.720e-09 2.222e-13
R_SIG012 PADfar_SW75_PRG0_PRU0_GPO9 Mux_Int_PADFAR_SIG12 0.08034
C_SIG012 Mux_Int_PADFAR_SIG12 VSS 0.222pF
L_SIG012 Mux_Int_PADFAR_SIG12 SW75_PRG0_PRU0_GPO9 1.720nH
*RC Circuit rON = 8E Typ CON = 5.6 pF Typ
R_SIG04 PADfar_SW75_PRG0_PRU0_GPO9 PADfar_SW75_PRG0_PRU0_GPO9_IN 8.0
C_SIG04 PADfar_SW75_PRG0_PRU0_GPO9_IN VSS 5.6pF
*34 B4 TS3DDR3812_BC_33 9.067e-02 1.951e-09 2.406e-13
R_SIG013 PADfar_SW75_PRG0_PRU0_GPO9_IN Mux_Int_PADFAR_SIG13 0.09067
C_SIG013 Mux_Int_PADFAR_SIG13 VSS 0.2406pF
L_SIG013 Mux_Int_PADFAR_SIG13 SW75_CPSW_RGMII1_RX_CTL 1.951nH
*33 C4 TS3DDR3812_BC_33 7.997e-02 1.701e-09 2.210e-13
R_SIG014 PADfar_SW75_PRG0_PRU0_GPO9_IN Mux_Int_PADFAR_SIG14 0.07997
C_SIG014 Mux_Int_PADFAR_SIG14 VSS 0.2210pF
L_SIG014 Mux_Int_PADFAR_SIG14 SW75_HSE_PRG0_PRU0_GPO9 1.701nH
*7 A5 TS3DDR3812_A_33 7.122e-02 1.509e-09 1.996e-13
R_SIG015 PADfar_SW75_PRG0_PRU0_GPO10 Mux_Int_PADFAR_SIG15 0.07122
C_SIG015 Mux_Int_PADFAR_SIG15 VSS 0.1996pF
L_SIG015 Mux_Int_PADFAR_SIG15 SW75_PRG0_PRU0_GPO10 1.509nH
*RC Circuit rON = 8E Typ CON = 5.6 pF Typ
R_SIG05 PADfar_SW75_PRG0_PRU0_GPO10 PADfar_SW75_PRG0_PRU0_GPO10_IN 8.0
C_SIG05 PADfar_SW75_PRG0_PRU0_GPO10_IN VSS 5.6pF
*32 B5 TS3DDR3812_BC_33 7.083e-02 1.489e-09 2.017e-1
R_SIG016 PADfar_SW75_PRG0_PRU0_GPO10_IN Mux_Int_PADFAR_SIG16 0.07083
C_SIG016 Mux_Int_PADFAR_SIG16 VSS 0.2017pF
L_SIG016 Mux_Int_PADFAR_SIG16 SW75_CPSW_RGMII1_RXC 1.489nH
*31 C5 TS3DDR3812_BC_33 6.461e-02 1.345e-09 1.858e-13
R_SIG017 PADfar_SW75_PRG0_PRU0_GPO10_IN Mux_Int_PADFAR_SIG17 0.06461
C_SIG017 Mux_Int_PADFAR_SIG17 VSS 0.1858pF
L_SIG017 Mux_Int_PADFAR_SIG17 SW75_HSE_PRG0_PRU0_GPO10 1.345nH
Thanks and regards,
Usman
