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TXS02612: PIN FUNCTIONALITY

Part Number: TXS02612

Hi,

We are planning to use the TXS02612 Mux switch for JTAG in our design. Instead of routing the clock signal to the dedicated CLK pin, we are planning to use one of the data lines (D0–D5) for the clock connection.

Could you please confirm whether this configuration is supported and justify if the device will work reliably in this setup? Additionally does this works in 4000khz speed, please let us know if there are any functional or timing limitations associated with using a data line for the clock signal instead of the dedicated CLK pin.

Looking forward to your clarification.

  •  Hi Mudide,

    The device won't know if the input is CLK or DATA, however it is suggested to use the dedicated CLK channels as it leverages a buffered architecture to help achieve higher speeds than that of the DAT/CMD channels: 

    That said however, the DAT signals will be able to support the 4000KHz as this is within the operating limits of the device. Please also check with the Switching characteristics table to ensure that the other timing req. are acceptable for your application as well. 

    Regards,

    Jack

  • However, the device won't know the signal, what if I connect clk to any data lines and upto what frequency does it works?

  • Hi Mudide,

    Please refer to the timing requirements table in the datasheet for your VCCA/ VCCB application. As an unit exchange, 1MHz can be considered to be 2Mbps.

    Regards,

    Jack