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TS5A23166 control input leakage when VI < V+

Teroa
Prodigy 140 points
Other Parts Discussed in Thread: TS5A23166

We are planning to use TS5A23166 in application where V+=5V and logic is 3.3V. I'm not able to figure out from the datasheet how this affects to device leakage parameters. Datasheet values are specified for 5,5V logic operation.

1) What is expected digital control I_HL input leakage current (V+=5V, VI=3.3V)?

2) Is there any change in analog switch leakage specification (I_COM(ON/OFF), I_NO(ON/OFF) at our operating conditions (V+=5V, VI=0/3.3V) compared to datasheet values?

3) Is there any other side effects on performance caused by 3.3V logic input?

Thank you

 Tero

  • 0
    TI__Guru 62350 points
    Hi Tero ,

    The leakage current wont change much and definitely not more than the datasheet spec .
    Although the Icc would change probably more than the datasheet spec since the CMOS inputs don't like the inputs mid of Vcc rail.
  • 0 in reply to ShreyasRao
    Prodigy 140 points
    Thanks Shreyas,

    Can you give any number what the supply current (I+) will be in these operation conditions (V+=5V, V_I=3.3V). Datasheet states MAX 1uA in specified operation conditions. What is the maximum supply current that I can expect when both logic inputs are driven to 3.3V (rough estimate is enough 10uA, 100uA, 500uA,1mA,???)?

    Have these operation conditions any significant effect to life time of the device?

    -Tero
  • 0 in reply to Teroa
    TI__Guru 62350 points

    Hi Tero ,

    I couldn't find the char data of this currently .I would guess that the Icc would in the range of 50uA but it shouldn't affect the life time of the device since this is within the operating conditions .