Hi Team,
In TS3DDR4000, do SEL0/SEL1/EN pins have internal pull-up or down circuits? What's the default state of these three pins if leaving them unconnected?
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Hi Team,
In TS3DDR4000, do SEL0/SEL1/EN pins have internal pull-up or down circuits? What's the default state of these three pins if leaving them unconnected?
Luke,
The TS3DDR4000 does not have internal pull-up or pull-down circuits on the logic pins SEL0/SEL1/EN or any of the A/B/C signal paths. All unused control inputs of the device must be held at Vdd or GND to ensure proper device operation. You can refer to the TI application report, Implications of Slow or Floating CMOS Inputs application note for more information on the effects if you leave the pins unconnected.
Thank you,
Adam