Hello team,
I have some questions concerning TS3L501E. I want to use it in order to compensate a disadvantage of the daisy chain connection for an Ethernet phy. For the moment we are using mechanical relay and we want to go toward analog switch.
1) Do we have an application note on the TS3L501E?
2) Do we have a version with NC (normaly closed) type?
3) Is there any other recommendable devices?
Thanks in advance for your support,
Best regards,
Amjad
Amjad,
1) Do we have an application note on the TS3L501E?
Below are the technical documents on TI.com. The one that maybe the best introduction to solid state switches will be the first couple of pages of the analog switch selection guide.
2) Do we have a version with NC (normaly closed) type?
What do you mean NC type? The TS3L501E is a SDPT or 1:2 switch. It has both a normally open path and normally closed path.
Check out this e2e post for some more info on our solid state vs mechanical switches or relays.
3) Is there any other recommendable devices?
How many channels or data bits would they like to switch?
Do they want to switch 1:1 SPST or 1:2 SPDT?
What voltage level is the signal they wants to switch?
What is the bandwidth of the siganal he would like to switch?
Thank you,
Adam
Amjad,
You made a good choice with the TS3L501E device for your requirements. I have filtered the parametric table on TI.com based on your requirements and the TS3L501E is returned as a fit.
1) According to the previous explanations, my understanding is that when applying voltage supply to the TS3L501E and SEL pin is LOW, A(n) to B(n) pins are normally closed state and A(n) to C(n) are normally open, and when Vdd=0, all internal switches o are going to be under normally open status. Can you please confirm if my understanding is right?
The truth table in the datasheet that when the Power Down (PD) pin is high the device signal paths will be in a high impedance state. This means almost no current will flow through the signal path FETs (open). When the PD is low and the select (SEL) pin is set low the A path will conduct to the B path and current will pass freely (closed) but current will not pass freely to the C path (open). When you set the select pin high the current will flow freely between A and C path (closed) and the current will be restricted (or high impedance state) from the A path to the B path (open).
When there is no supply voltage present or VDD= 0 V the switch will be in a high impedance state (Hi-Z) restricing current flow through all signal paths. You can see the amount of leakage characterized in the datasheet spec below. This is saying with VDD = 0V if you place a voltage up to 3.6 volts on the signal path how good of blocking the signal and current flow through the signal paths as if it were an open circuit. I reality these are solid state switches and it wont be an actually open circuit and less than 1uA could leak through the transistor that is turned off.
2) Based on the customer requirements, does the TS3L501E fit the application?
Yes, you can see all off these spec satisfied in the TS3L501E datasheet.
Thank you,
Adam
