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Reset Fanout 1 to many at 1.8V LVCMOS

Divya jyothi
Intellectual 810 points
Other Parts Discussed in Thread: CDCLVC1110, SN74AUC1G17

Dear E2E Community,

In one of the application we are using reset fan out buffer, please suggest me to select the part number for the below requirement.

Input Channel :1

Output channel :Many

Voltage Level :1.8 LVCMOS (Active Low preferred.)

With regards,

Divya

  • 0
    Guru 317450 points

    CMOS logic buffers have a huge fanout; here is a search of 1.8 V devices.

    You probably do not need an open-drain output.

    A Schmitt-trigger input is needed of your input signal has slow edges.

  • 0 in reply to Clemens Ladisch
    Intellectual 810 points

    Hi...

    Thank you for your quick support.

    I am not finding any part according to my application i.e buffer with 1:10 configuration in the above search (here is a search of 1.8 V devices.).

    Please suggest me for selecting 1:10 buffer IC.

    With regards,

    Divya

  • 0 in reply to Divya jyothi
    Guru 317450 points
    Do you want to route the reset signal to all ten devices at the same time, or do you want to choose one of them?
  • 0 in reply to Clemens Ladisch
    Intellectual 810 points
    Yes, i want to route the reset signal to all ten devices at the same time.

    regards,
    Divya
  • 0 in reply to Divya jyothi
    Guru 317450 points

    Then you do not need any switch or demultiplexer; you need just a buffer.

    The leakage current of CMOS inputs is so low that you can easily connect hundreds of devices to a single output; the largest problem are the parasitic inductances and capacitances of the signal lines between the devices. Therefore, nobody bothers to specify a fanout for CMOS logic gates.

    The HCMOS Design Considerations (SCLA007) application note shows how to compute a theoretical fanout value:

  • 0 in reply to Clemens Ladisch
    Intellectual 810 points
    Hi...

    For my application i can't drive many device by using single output buffer, because i don't know about the parasitic and capacitances of signal lines between the devices.
    So I wanted to know, can i use this part CDCLVC1110 (clock buffer LVCMOS 3.3 /2.5V) as data buffer ?
    If it's possible can i get the similar part with LVCMOS 1.8V IO level.

    regards,
    Divya
  • 0 in reply to Divya jyothi
    Guru 317450 points
    Those parasitic effects are unknown, but not very large, and every normal logic device can easily overcome them. They might reduce the fanout from about 1000 to about 500. In any case, they do not really matter; you can use any random logic buffer.

    Just use the SN74AUC1G17.