• State TI Thinks Resolved
  • Locked Locked
  • Replies 6 replies
  • Answers 2 answers
  • Subscribers 16 subscribers
  • Views 695 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TS3DDR4000: TS3DDR4000 - To be used as buffer instead of switch

Rohith K Kiruba
Prodigy 220 points
Part Number: TS3DDR4000

Dear Team,

I have planned to use TS3DDR4000 - TS3DDR4000 12-bits 1:2 high speed DDR2/DDR3/DDR4 switch/multiplexer is my design.

My requirement is to tap the DDR4 address and command lines.

So i am planned to connect Address and Command lines from Host to input B and connect address and command lines from memory to input A. I will short B and C internally in PCB and take output C for my probing purpose will this design topology works. Or do you have any other suggestion for taping high speed lines for probing.

  • 0
    TI__Mastermind 45575 points

    Rohith,

    Let me see if I understand correctly.  You would like to isolate the memory from the host during probing of the host signal?  If you short host to probe there will always bee a stub on the line. 

    You may want to consider connecting the host to A, the probe to B, and the memory to C.  This way you can have the host communicate to the memory without the probe stub.

    Thank you,

    Adam

  • 0 in reply to Adam Torma
    Prodigy 220 points

    Dear Allen,

    My requirement is not to isolate Host from memory while probing, I want to connect Host Memory and Probe in single point without stub.

    Do you have any design topology for this requirement.

    Also kindly share IBIS model for TS3DDR4000 for our simulation purpose.

    It will be useful if you share internal block diagram of TS3DDR4000.

    Regards,

    Rohith K

  • 0 in reply to Rohith K Kiruba
    TI__Mastermind 45575 points

    Rohith,

    I don't have a design topology to probe a signal path without a stub.  I'm sure you can physically do this because there will always be a stub but some stubs maybe lager than others.  There will still be a stub inside the IC but not on the same scale as a PCB trace. 

    What performance are you trying to simulate?  An I/O Buffer Information Specification (IBIS) model is not valid for this type of passive device (no buffer).  There are s-parameter models in this e2e post below or SPICE model on the TI.com product page.

    The signal path is an NFET with it's gate biased by a charge pump.

    Thank you,

    Adam

    Thank you,

    Adam

    Thank you,

    Adam   

  • 0 in reply to Adam Torma
    Prodigy 220 points

    Dear Allen,

    Thanks for your valuable reply, The IBIS file link what you shared shows message the page doesn't exist.

    Also can you suggest any buffer IC solution instead of MUX which operates at high speed of about 1.6 GHz.

    Thanks and Regards,

    Rohith K

  • 0 in reply to Rohith K Kiruba
    TI__Mastermind 45575 points

    Rohith,

    Here is the link I intended to send with the s-parameter model.

    I will contact the high speed redriver team to make a recommendation for a high speed buffer.

    Thank you,

    Adam

  • 0 in reply to Adam Torma
    TI__Guru*** 146055 points
    not sure what you want to do. It either goes from A to B or A to C. if you short B and C, then you don't need this switch.