SN74CBTLV3126: What is the correct operation of the control logic pin OE? Datasheet mistake?

Kenji Ohno1

Genius 5095 points

Part Number: SN74CBTLV3126
Other Parts Discussed in Thread: SN74CBTLV3125

Hi Team,

Are the following errors described in 8.1 Overview of the datasheet?

"The FET multiplexers and demultiplexers are disabled when the output-enable (OE) input is high."

I understand that when it is low it will be disabled.

Best Regards,

Kenji

over 6 years ago

0 Adam Torma over 6 years ago

TI__Mastermind 45605 points

Kenji,

Please use the truth table in 8.4.1 for the SN74CBTLV3126 that states when OE input is logic High the device connects a low impedance path from A to B.

The SN74CBTLV3125 will be the same device with the opposite truth table.

Thank you,

Adam

0 Kenji Ohno1 over 6 years ago in reply to Adam Torma

Genius 5095 points

Hi Quote-san,

Thank you for answering.

I have one more thing I want to know.

The 8.1 Overview states that it is necessary to pull up OEpin at Vcc.

On the other hand, in 9.2.1.2 Detailed Design Procedure, OE is recommended to be pulled up with Vcc or pulled down with GND.

It is desirable that the switch be turned off at SB power on.

I am worried that the switch will be turned on in 8.1.

How should I handle OEpin?

Best Regards,

Kenji

0 Adam Torma over 6 years ago in reply to Kenji Ohno1

TI__Mastermind 45605 points

Kenji,

You may pull up or pull down the OE pin depending on what you what to default the switch state. The intent is to prevent that pin from floating and place the device in an unknown state which could result in excess current consumption.

Thank you,

Adam

Switches & multiplexers

Switches & multiplexers forum

SN74CBTLV3126: What is the correct operation of the control logic pin OE? Datasheet mistake?