DS90LV028ATLD

Hi Joseph,

Can you share waveforms? Are the signals on the LVDS input valid? What is the load connected to the outputs? Also, can you share your schematic?

Regards,

I.K. 

I will share the wave from later today.

Regarding the LVDS signals, yes we have those signals on the input, attached is a screen shot fro the design, please let me know if you need more details, and of we can have a skype contact it will be better and easier.

Thanks,

Joseph SCHEMATIC1 _ 04- Divider.pdf

Hi Joseph,

For the waveforms please measure them at the device pins. 

For your design, can you replace the AC coupling caps with 0-ohm resistors? I don't believe AC coupling is necessary here. 

Also, if you provide no input to the device, are the outputs still at 5V or are they 3V?

Regards,

I.K.

Hi I.K.
Thanks for your reply, I will try the test and send the result, meanwhile I have more measurements from yesterday, please check below and attached. 

U2 output (U3 input) : 9.76MHz, 500mV peak-to-peak and 360mV between steady state levels

 All U3 inputs are showing same waveform (frequency and amplitude).

Clock_Test.pptxU3 output:

• ROut2 (VND_IO_E):  9.76MHz, 4.6V peak-to-peak and 3.3V between steady state levels (due to oscillation).
• ROut1 (REFCLK):  9.76MHz, 4.7V peak-to-peak and 3.4V between steady state levels (due to oscillation).

more data below;

CAP present:
- with clock: Rout1 and 2 : 1.64V
- without clock: Rout1 and 2: 0.87V

CAP replaced with 0 ohm resistor:
- with clock: Rout1 and 2 : 1.75V
- without clock: Rout1 and 2: 0.44

Hi Joseph,

It looks like it is just the overshooting/undershooting on the output that it causing it to go to 4.6V and 4.7V. Without it the output looks to be around 3.3V level.

The overshooting/undershooting is caused by reflections, which is due to impedance mismatching. You can add a small series damping resistor to reduce it. Also, if you use AC coupling caps on the input you need to ensure that the common mode of the LVDS signal on the input of the DS90LV028A is within specification of the datasheet (GND to 2.4V; 1.2V typical).

Regards,

I.K. 

Hi,

Just a quick question, you mean the reflection on the Input or at the output of the chip is causing the overshooting/undershooting ?

Thanks,

Joseph 

This is the signal level on the input

Can we have a quick call using skype or teams.. ?

Hi Joseph,

It could be both. Your input looks like it also has reflections, which could be getting passed on to the output. 

Sure we can have a quick call. I sent you a friend request on here. Please accept it and we can discuss when to set up the call.

Regards,

I.K. 

Hi,

Thanks, also I would like to make sure if we should have controlled impedance for the output ?

and how can we solve it by adding damping resistor, how can we choose the optimum value?

regarding the call I'm currently in Beirut-Lebanon so you can decide the better time for both of us.

Thanks,

Joseph