Hi team,
Is the default condition of pin 9 and pin 12, which refer to D3 and D4, high impedance when these pins are not connected?
Best regards,
Wendy
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Hi team,
Is the default condition of pin 9 and pin 12, which refer to D3 and D4, high impedance when these pins are not connected?
Best regards,
Wendy
HI Wendy,
The Dx pins are Hi-Z only when EN/ = 1 (H) i.e. chip is not enabled (Table 1, truth table in datasheet). During this time the channel SEL pin has no influence on the switch status.
If EN/ = 0 (L), depending on the SEL pin condition either Dx to SxA channels or Dx to SxB channels will be connected. Under this condition the Dx pins will not be Hi-Z but the non-connected Sx channel will be Hi-Z depending upon the switch status.
Ex: if the Dx is connected to SxA, EN/=- (L) + SEL = 0 (L), the SxB side switch will be OFF and vice versa.
Hope this helps. Let me know if any further questions.
Thank you,
Regards,
Sandesh