The C2000 linker generated "bin" file is very huge in MB

It must be the case that there is a large gap in memory between initialized sections.  This gap may be occupied with uninitialized sections like .stack, or there may be nothing at all.  To understand why a binary file fills a gap like that with 0, please see the article An Introduction to Binary Files.  The fix is to get all the initialized sections close together in memory.  The best way to do that varies.  Please put the linker command file, and the linker map file, into a zip, then attach that zip to your next post.

Thanks and regards,

-George

Hello George,

We have tried your suggestion which is mentioned above and the result is the same as like as before what we getting the bin file size. Herewith are attached the .map file and cmd file for your referance and please have a lookout at those files.

Can you please help us to move out this issue and thanks in advance for giving the valuable time.  

 

Sorry, I couldn't attach the zip file. Here is the cmd file FYI.

CMD file:

/* -*- C -*-
//###########################################################################
// FILE: F28M35H52C1_c28.cmd
// TITLE: Linker Command File For F28M35H52C1 Device
//###########################################################################
// $TI Release: F28M35x Driver Library vBeta1 $
// $Release Date: August 31, 2011 $
//###########################################################################
*/

/* ======================================================
// For Code Composer Studio V2.2 and later
// ---------------------------------------
// In addition to this memory linker command file,
// add the header linker command file directly to the project.
// The header linker command file is required to link the
// peripheral structures to the proper locations within
// the memory map.
// The header linker files are found in <base>\F28M35x_headers\cmd
// For BIOS applications add: F28M35x_Headers_BIOS.cmd
// For nonBIOS applications add: F28M35x_Headers_nonBIOS.cmd
========================================================= */

/* Define the memory block start/length for the F28M35x
PAGE 0 will be used to organize program sections
PAGE 1 will be used to organize data sections

Notes:
Memory blocks on F28M35x are uniform (ie same
physical memory) in both PAGE 0 and PAGE 1.
That is the same memory region should not be
defined for both PAGE 0 and PAGE 1.
Doing so will result in corruption of program
and/or data.

Contiguous SARAM memory blocks or flash sectors can be
be combined if required to create a larger memory block.
*/

MEMORY
{
PAGE 0: /* Program Memory */
/* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */
/*RAML0 : origin = 0x008000, length = 0x001000*/ /* on-chip RAM block L0 */
/*RAML1 : origin = 0x009000, length = 0x001000*/ /* on-chip RAM block L1 */

/* XXX Check this for overlays on page 1 */
RAMFUNC : origin = 0x008000, length = 0x002200 /* on-chip RAM block L0 and L1 */
/* RAML2 : origin = 0x009000, length = 0x001e00*/
/* DMARAML2 : origin = 0x00ae00, length = 0x000200*/
/* CAPTURERAM: origin = 0x00B000, length = 0x003000 On Page 1 -- NOTE Overlay with FLASHRAM */
FLASHRAM : origin = 0x00D000, length = 0x001000 /* Shared RAM S0-S1 overlayed with capture buffer ram */

//Working Code
BEGIN : origin = 0x104000, length = 0x000002 /* sector L*/
FLASH : origin = 0x104002, length = 0x035ffd /* on-chip flash Sector N-D on-chip flash */

// Image-A (Sector-J(32k),I(32k) and H(32k))
//BEGIN : origin = 0x108000, length = 0x000002 /* sector J*/
//FLASH : origin = 0x108002, length = 0x017ffe /* Sector J-H on-chip flash */

// Image-B (Sector-G(32k),F(32k) and E(32k))
//BEGIN : origin = 0x120000, length = 0x000002 /* sector G*/
//FLASH : origin = 0x120002, length = 0x017ffe /* Sector J-H on-chip flash */

/* Without bootloader */
//FLASHL : origin = 0x104000, length = 0x002000 /* on-chip FLASH */
//FLASHK : origin = 0x106000, length = 0x002000 /* on-chip FLASH */
/*Image-A*/
//FLASHJ : origin = 0x108000, length = 0x008000 /* on-chip FLASH */
//FLASHI : origin = 0x110000, length = 0x008000 /* on-chip FLASH */
//FLASHH : origin = 0x118000, length = 0x008000 /* on-chip FLASH */
/*Image-B*/
//FLASHG : origin = 0x120000, length = 0x008000 /* on-chip FLASH */
//FLASHF : origin = 0x128000, length = 0x008000 /* on-chip FLASH */
//FLASHE : origin = 0x130000, length = 0x008000 /* on-chip FLASH */

//FLASHD : origin = 0x138000, length = 0x002000 /* on-chip FLASH */
//FLASHC : origin = 0x13A000, length = 0x002000 /* on-chip FLASH */

// Working Code
FLASHA : origin = 0x13E000, length = 0x001F80 /* on-chip FLASH */
CSM_RSVD : origin = 0x13FF80, length = 0x000070 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */
REDIRECT : origin = 0x13FFF0, length = 0x000002 /* Part of FLASHA. Used for "boot to Flash" bootloader mode. */
FLASH_EXE_ONLY_P0 : origin = 0x13FFF2, length = 0x000002 /* Part of FLASHA. Flash execute only locations in FLASHA */
ECSL_PWL_P0 : origin = 0x13FFF4, length = 0x000004 /* Part of FLASHA. ECSL password locations in FLASHA */
CSM_PWL_P0 : origin = 0x13FFF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */

// Bootloader Code
//FLASHD : origin = 0x138000, length = 0x001F80 /* on-chip FLASH */
//CSM_RSVD : origin = 0x139F80, length = 0x000070 /* Part of FLASHD. Program with all 0x0000 when CSM is in use. */
//REDIRECT : origin = 0x139FF0, length = 0x000002 /* Part of FLASHD. Used for "boot to Flash" bootloader mode. */
//FLASH_EXE_ONLY_P0 : origin = 0x139FF2, length = 0x000002 /* Part of FLASHD. Flash execute only locations in FLASHD */
//ECSL_PWL_P0 : origin = 0x139FF4, length = 0x000004 /* Part of FLASHD. ECSL password locations in FLASHD */
//CSM_PWL_P0 : origin = 0x139FF8, length = 0x000008 /* Part of FLASHD. CSM password locations in FLASHD */

FPUTABLES : origin = 0x3FD258, length = 0x0006A0 /* FPU Tables in Boot ROM */
IQTABLES : origin = 0x3FD8F8, length = 0x000B50 /* IQ Math Tables in Boot ROM */
IQTABLES2 : origin = 0x3FE448, length = 0x00008C /* IQ Math Tables in Boot ROM */
IQTABLES3 : origin = 0x3FE4D4, length = 0x0000AA /* IQ Math Tables in Boot ROM */

BOOTROM : origin = 0x3FEDA8, length = 0x001200 /* Boot ROM */
PIEMISHNDLR : origin = 0x3FFFBE, length = 0x000002 /* part of boot ROM */
RESET : origin = 0x3FFFC0, length = 0x000002 /* part of boot ROM */
VECTORS : origin = 0x3FFFC2, length = 0x00003E /* part of boot ROM */

PAGE 1 : /* Data Memory */
/* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
/* Registers remain on PAGE1 */

BOOT_RSVD : origin = 0x000000, length = 0x000050 /* Part of M0, BOOT rom will use this for stack */
RAMM01 : origin = 0x000050, length = 0x0007B0 /* on-chip RAM block M0 */

/* RAMFUNC : origin = 0x008000, length = 0x001200 On Page 0*/
//RAML2 : origin = 0x00a200, length = 0x001c00 /* on-chip RAM block L2 */
//DMARAML2 : origin = 0x00ae00, length = 0x000200
//RAML3 : origin = 0x00B000, length = 0x001000 /* on-chip RAM block L3 */
//CAPTURERAM : origin = 0x00C000, length = 0x002000 /* on-chip L3 + shared block S0-S1 */
/* FLASHRAM: origin = 0x00D000, length = 0x001000 On Page 0 -- NOTE Overlay with CAPTURERAM make sure CAPTURE RAM is at least 0x2000 non-overlay*/

RAML2 : origin = 0x009200, length = 0x001c00 /* on-chip RAM block L2 */
DMARAML2 : origin = 0x00be00, length = 0x000200
RAML3 : origin = 0x00C000, length = 0x001000 /* on-chip RAM block L3 */
CAPTURERAM : origin = 0x00D000, length = 0x001000 /* on-chip L3 + shared block S0-S1 */

/* Note, shared blocks S4, S5, S6 and S7 are used for mcfifo buffers */

/*RAML3 : origin = 0x00B000, length = 0x001000*/ /* on-chip RAM block L3 */
/*RAMS0 : origin = 0x00C000, length = 0x001000*/ /* on-chip Shared RAM block S0 */
/*RAMS1 : origin = 0x00D000, length = 0x001000*/ /* on-chip Shared RAM block S1 */
/*RAMS2 : origin = 0x00E000, length = 0x001000*/ /* on-chip Shared RAM block S2 */
/*RAMS3 : origin = 0x00F000, length = 0x001000*/ /* on-chip Shared RAM block S3 */
/*RAMS4 : origin = 0x010000, length = 0x001000*/ /* on-chip Shared RAM block S4 */
/*RAMS5 : origin = 0x011000, length = 0x001000*/ /* on-chip Shared RAM block S5 */
/*RAMS6 : origin = 0x012000, length = 0x001000*/ /* on-chip Shared RAM block S6 */
/*RAMS7 : origin = 0x013000, length = 0x001000*/ /* on-chip Shared RAM block S7 */

CTOMRAM : origin = 0x03F800, length = 0x000360 /* C28 to M3 Message RAM */
SHARED_DEF : origin = 0x03FB60, length = 0x000020 /* Environment vars for ARM */

MTOCRAM : origin = 0x03FC00, length = 0x000380 /* M3 to C28 Message RAM */
LWIP_STAT : origin = 0x03FF80, length = 0x00007C /* M3 to C28 Message RAM */
MACID : origin = 0x03FFFC, length = 0x000004 /* M3 to C28 Message RAM */

/* Without bootloader */
//FLASHB : origin = 0x13C000, length = 0x002000 /* on-chip FLASH */

FLASHN : origin = 0x100000, length = 0x002000 /* on-chip FLASH */
FLASHM : origin = 0x102000, length = 0x002000 /* on-chip FLASH */

}

/* Allocate sections to memory blocks.
Note:
codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code
execution when booting to flash
ramfuncs user defined section to store functions that will be copied from Flash into RAM
*/

SECTIONS
{

/* Allocate program areas: */
.cinit : > FLASH PAGE = 0
.pinit : > FLASH, PAGE = 0
.text : >> FLASH PAGE = 0

codestart : > BEGIN PAGE = 0
coderedirect : > REDIRECT PAGE = 0

#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 15009000
GROUP
{
ramfuncs /*.TI.ramfunc */
{ -l F021_API_C28x_FPU32.lib}

} LOAD = FLASH,
RUN = RAMFUNC,
LOAD_START(_RamfuncsLoadStart),
LOAD_END(_RamfuncsLoadEnd),
LOAD_SIZE(_RamfuncsLoadSize),
RUN_START(_RamfuncsRunStart),
PAGE = 0
#else
GROUP
{
flashfuncs
{ -l F021_API_C28x_FPU32.lib }
} LOAD = FLASH,
RUN = FLASHRAM,
LOAD_START(_FlashfuncsLoadStart),
LOAD_END(_FlashfuncsLoadEnd),
LOAD_SIZE(_FlashfuncsLoadSize),
RUN_START(_FlashfuncsRunStart),
PAGE = 0
#endif
#endif

flashexeonly : > FLASH_EXE_ONLY_P0 PAGE = 0
ecslpasswds : > ECSL_PWL_P0 PAGE = 0
csmpasswds : > CSM_PWL_P0 PAGE = 0
csm_rsvd : > CSM_RSVD PAGE = 0

//#ifdef __TI_COMPILER_VERSION__
//#if __TI_COMPILER_VERSION__ >= 15009000
ramfuncs : {} > RAMFUNC, PAGE = 0
//#else
// ramfuncs : > RAMFUNC, PAGE = 0
//#endif
//#endif

/* The following section definitions are required when using the IPC API Drivers */
GROUP : > CTOMRAM, PAGE = 1
{
/*
PUTBUFFER
PUTWRITEIDX
GETREADIDX
*/
C28_MSGRAM_FIFOS
C28_FIFO_PTRS
}

shared_def: > SHARED_DEF, PAGE = 1

GROUP : > MTOCRAM, PAGE = 1
{
/*
GETBUFFER : TYPE = DSECT
GETWRITEIDX : TYPE = DSECT
PUTREADIDX : TYPE = DSECT
*/
M3_MSGRAM_FIFOS : TYPE = DSECT
M3_FIFO_PTRS : TYPE = DSECT
}

GROUP : > LWIP_STAT, PAGE = 1
{
lwip_stats : TYPE = DSECT
}

GROUP : > MACID, PAGE = 1
{
.macid : TYPE = DSECT
}

/* Allocate uninitalized data sections: */
.cio : > RAMM01 PAGE = 1, TYPE = NOINIT
.stack : > RAMM01 PAGE = 1, TYPE = NOINIT
.ebss : >> RAML2|RAML3 PAGE = 1, TYPE = NOINIT
.esysmem : > RAML2 PAGE = 1, TYPE = NOINIT

/* Initalized sections go in Flash */
/* For SDFlash to program these, they must be allocated to page 0 */
.econst : > FLASH PAGE = 0, ALIGN(4) //> FLASHC PAGE = 0 SPN, 2012-12-10
.switch : > FLASH PAGE = 0, ALIGN(4)

/* Allocate IQ math areas: */
IQmath : > FLASH PAGE = 0 /* Math Code */
IQmathTables : > IQTABLES, PAGE = 0, TYPE = NOLOAD

/* Allocate FPU math areas: */
FPUmathTables : > FPUTABLES, PAGE = 0, TYPE = NOLOAD

capture_buffer : > CAPTURERAM, PAGE = 1, TYPE = DSECT

enva : > FLASHN, PAGE = 1 TYPE = DSECT
envb : > FLASHM, PAGE = 1 TYPE = DSECT

DMARAM : > DMARAML2, PAGE = 1
/*
DMARAML2 : > RAML2, PAGE = 1
DMARAML3 : > RAML3, PAGE = 1*/

/* Flash Programming Buffer */
BufferDataSection : > RAML3, PAGE = 1, ALIGN(4)

/* Uncomment the section below if calling the IQNexp() or IQexp()
functions from the IQMath.lib library in order to utilize the
relevant IQ Math table in Boot ROM (This saves space and Boot ROM
is 1 wait-state). If this section is not uncommented, IQmathTables2
will be loaded into other memory (SARAM, Flash, etc.) and will take
up space, but 0 wait-state is possible.
*/
/*
IQmathTables2 : > IQTABLES2, PAGE = 0, TYPE = NOLOAD
{

IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)

}
*/
/* Uncomment the section below if calling the IQNasin() or IQasin()
functions from the IQMath.lib library in order to utilize the
relevant IQ Math table in Boot ROM (This saves space and Boot ROM
is 1 wait-state). If this section is not uncommented, IQmathTables2
will be loaded into other memory (SARAM, Flash, etc.) and will take
up space, but 0 wait-state is possible.
*/
/*
IQmathTables3 : > IQTABLES3, PAGE = 0, TYPE = NOLOAD
{

IQmath.lib<IQNasinTable.obj> (IQmathTablesRam)

}
*/

/* .reset is a standard section used by the compiler. It contains the */
/* the address of the start of _c_int00 for C Code. /*
/* When using the boot ROM this section and the CPU vector */
/* table is not needed. Thus the default type is set here to */
/* DSECT */
.reset : > RESET, PAGE = 0, TYPE = DSECT
vectors : > VECTORS PAGE = 0, TYPE = DSECT

}

/*
*/

EOF cmd file.

---------------------------------------------------------------------------------------------------------------------------

The Map file:

******************************************************************************
TMS320C2000 Linker PC v16.9.1
******************************************************************************
>> Linked Fri Jul 16 14:16:44 2021

OUTPUT FILE NAME: <excite_c28.out>
ENTRY POINT SYMBOL: "_c_int00" address: 00111751

MEMORY CONFIGURATION

name origin length used unused attr fill
---------------------- -------- --------- -------- -------- ---- --------
PAGE 0:
RAMFUNC 00008000 00002200 000016a9 00000b57 RWIX
FLASHRAM 0000d000 00001000 00000000 00001000 RWIX
BEGIN 00104000 00000002 00000002 00000000 RWIX
FLASH 00104002 00035ffd 0000dfc3 0002803a RWIX
FLASHA 0013e000 00001f80 00000000 00001f80 RWIX
CSM_RSVD 0013ff80 00000070 00000070 00000000 RWIX
REDIRECT 0013fff0 00000002 00000002 00000000 RWIX
FLASH_EXE_ONLY_P0 0013fff2 00000002 00000002 00000000 RWIX
ECSL_PWL_P0 0013fff4 00000004 00000004 00000000 RWIX
CSM_PWL_P0 0013fff8 00000008 00000008 00000000 RWIX
FPUTABLES 003fd258 000006a0 00000000 000006a0 RWIX
IQTABLES 003fd8f8 00000b50 00000000 00000b50 RWIX
IQTABLES2 003fe448 0000008c 00000000 0000008c RWIX
IQTABLES3 003fe4d4 000000aa 00000000 000000aa RWIX
BOOTROM 003feda8 00001200 00000000 00001200 RWIX
PIEMISHNDLR 003fffbe 00000002 00000000 00000002 RWIX
RESET 003fffc0 00000002 00000000 00000002 RWIX
VECTORS 003fffc2 0000003e 00000000 0000003e RWIX

PAGE 1:
BOOT_RSVD 00000000 00000050 00000000 00000050 RWIX
RAMM01 00000050 000007b0 00000600 000001b0 RWIX
DEV_EMU 00000880 00000180 00000048 00000138 RWIX
CSM 00000ae0 00000020 00000016 0000000a RWIX
ADC1_RESULT 00000b00 00000020 00000010 00000010 RWIX
ADC2_RESULT 00000b40 00000020 00000010 00000010 RWIX
CPU_TIMER0 00000c00 00000008 00000008 00000000 RWIX
CPU_TIMER1 00000c08 00000008 00000008 00000000 RWIX
CPU_TIMER2 00000c10 00000008 00000008 00000000 RWIX
PIE_CTRL 00000ce0 00000020 0000001a 00000006 RWIX
PIE_VECT 00000d00 00000100 000000f8 00000008 RWIX
PIE_VECT_CP 00000e00 00000100 000000f8 00000008 RWIX
DMA 00001000 00000200 000000e0 00000120 RWIX
ASYSCTRLCONFIG 00001700 00000080 00000078 00000008 RWIX
HWBIST 00001780 00000040 00000000 00000040 RWIX
FLASH_REGS 00004000 00000300 00000182 0000017e RWIX
FLASH_ECC 00004300 00000040 00000024 0000001c RWIX
M3PLL 00004400 00000040 00000008 00000038 RWIX
EPI_REGS 00004440 00000010 00000000 00000010 RWIX
RAM_REGS 00004900 00000080 0000003e 00000042 RWIX
RAM_ERR_REGS 00004a00 00000080 0000003e 00000042 RWIX
CM_MC_IPC 00004e00 00000040 00000040 00000000 RWIX
MCBSPA 00005000 00000040 00000024 0000001c RWIX
EPWM1 00005100 00000080 00000080 00000000 RWIX
EPWM2 00005180 00000080 00000080 00000000 RWIX
EPWM3 00005200 00000080 00000080 00000000 RWIX
EPWM4 00005280 00000080 00000080 00000000 RWIX
EPWM5 00005300 00000080 00000080 00000000 RWIX
EPWM6 00005380 00000080 00000080 00000000 RWIX
EPWM7 00005400 00000080 00000080 00000000 RWIX
EPWM8 00005480 00000080 00000080 00000000 RWIX
EPWM9 00005500 00000080 00000080 00000000 RWIX
ECAP1 00005a00 00000020 00000020 00000000 RWIX
ECAP2 00005a20 00000020 00000020 00000000 RWIX
ECAP3 00005a40 00000020 00000020 00000000 RWIX
ECAP4 00005a60 00000020 00000020 00000000 RWIX
ECAP5 00005a80 00000020 00000020 00000000 RWIX
ECAP6 00005aa0 00000020 00000020 00000000 RWIX
EQEP1 00005b00 00000040 00000022 0000001e RWIX
EQEP2 00005b40 00000040 00000022 0000001e RWIX
EQEP3 00005b80 00000040 00000022 0000001e RWIX
GPIOG1CTRL 00005f80 00000040 00000040 00000000 RWIX
GPIOG1DAT 00005fc0 00000020 00000020 00000000 RWIX
GPIOG1TRIP 00005fe0 00000020 00000020 00000000 RWIX
COMP1 00006400 00000020 00000007 00000019 RWIX
COMP2 00006420 00000020 00000007 00000019 RWIX
COMP3 00006440 00000020 00000007 00000019 RWIX
COMP4 00006460 00000020 00000007 00000019 RWIX
COMP5 00006480 00000020 00000007 00000019 RWIX
COMP6 000064a0 00000020 00000007 00000019 RWIX
GPIOG2CTRL 00006f80 00000040 0000003c 00000004 RWIX
GPIOG2DAT 00006fc0 00000020 00000020 00000000 RWIX
SYSTEM 00007010 00000020 0000001d 00000003 RWIX
SPIA 00007040 00000010 00000010 00000000 RWIX
SCIA 00007050 00000010 00000010 00000000 RWIX
NMIINTRUPT 00007060 00000010 00000006 0000000a RWIX
XINTRUPT 00007070 00000010 00000010 00000000 RWIX
ADC1 00007100 00000080 00000050 00000030 RWIX
ADC2 00007180 00000080 00000050 00000030 RWIX
I2CA 00007900 00000040 00000022 0000001e RWIX
RAML2 00009200 00001c00 00001be0 00000020 RWIX
DMARAML2 0000be00 00000200 00000000 00000200 RWIX
RAML3 0000c000 00001000 00000140 00000ec0 RWIX
CAPTURERAM 0000d000 00001000 00000000 00001000 RWIX
CTOMRAM 0003f800 00000360 00000228 00000138 RWIX
SHARED_DEF 0003fb60 00000020 00000010 00000010 RWIX
MTOCRAM 0003fc00 00000380 00000000 00000380 RWIX
LWIP_STAT 0003ff80 0000007c 00000000 0000007c RWIX
MACID 0003fffc 00000004 00000000 00000004 RWIX
FLASHN 00100000 00002000 00000000 00002000 RWIX
FLASHM 00102000 00002000 00000000 00002000 RWIX
FLASH_EXE_ONLY 0013fff2 00000002 00000002 00000000 RWIX
ECSL_PWL 0013fff4 00000004 00000004 00000000 RWIX
CSM_PWL 0013fff8 00000008 00000008 00000000 RWIX

SECTION ALLOCATION MAP

output attributes/
section page origin length input sections
-------- ---- ---------- ---------- ----------------
codestart
* 0 00104000 00000002
00104000 00000002 F28M35x_CodeStartBranch.obj (codestart)

ramfuncs 0 00104002 00001696 RUN ADDR = 00008000
00104002 00000593 control.obj (ramfuncs)
00104595 000002a9 firmwareupgrde.obj (ramfuncs)
0010483e 00000257 emp.obj (ramfuncs)
00104a95 00000101 flash.obj (ramfuncs)
00104b96 000000ca capture.obj (ramfuncs)
00104c60 00000023 dev_init.obj (ramfuncs)
00104c83 0000000f faults.obj (ramfuncs)
00104c92 00000004 F28M35x_usDelay.obj (ramfuncs)
00104c96 00000340 F021_API_C28x_FPU32.lib : FlashStateMachine.obj (.text)
00104fd6 000002dc : Read.obj (.text)
001052b2 000001c8 : Program.obj (.text)
0010547a 000000a8 : Utilities.obj (.text)
00105522 0000007b : BlankCheck.obj (.text)
0010559d 00000071 : FlashStateMachine.obj (.text)
0010560e 00000034 : Init.obj (.text)
00105642 0000002b : Async.obj (.text)
0010566d 0000001e : Verify.obj (.text)
0010568b 00000001 --HOLE-- [fill = 0]
0010568c 0000000c : Init.obj (.ebss) [fill = 0]

.cinit 0 00111b12 000004b3
00111b12 0000011c dspsock_def.obj (.cinit)
00111c2e 000000b6 control_def.obj (.cinit)
00111ce4 0000007c comm_def.obj (.cinit)
00111d60 00000077 raw_def.obj (.cinit)
00111dd7 00000060 motor_def.obj (.cinit)
00111e37 00000035 faults_def.obj (.cinit)
00111e6c 0000002d emp.obj (.cinit)
00111e99 00000024 capture_def.obj (.cinit)
00111ebd 00000023 faults.obj (.cinit)
00111ee0 0000001f var.obj (.cinit)
00111eff 0000001a control.obj (.cinit)
00111f19 00000017 root.obj (.cinit)
00111f30 00000014 test_def.obj (.cinit)
00111f44 00000013 coro_test.obj (.cinit)
00111f57 00000013 shared_def.obj (.cinit)
00111f6a 00000012 firmwareupgrde.obj (.cinit)
00111f7c 0000000e rts2800_fpu32.lib : exit.obj (.cinit)
00111f8a 0000000a coro.obj (.cinit)
00111f94 00000009 firmwareupgrde_def.obj (.cinit)
00111f9d 00000008 comm.obj (.cinit)
00111fa5 00000008 motor.obj (.cinit)
00111fad 00000005 rts2800_fpu32.lib : _lock.obj (.cinit:__lock)
00111fb2 00000005 : _lock.obj (.cinit:__unlock)
00111fb7 00000004 env.obj (.cinit)
00111fbb 00000004 rts2800_fpu32.lib : errno.obj (.cinit)
00111fbf 00000004 web.obj (.cinit)
00111fc3 00000002 --HOLE-- [fill = 0]

.pinit 0 00104002 00000000 UNINITIALIZED

csm_rsvd 0 0013ff80 00000070
0013ff80 00000070 F28M35x_CSMPasswords.obj (csm_rsvd)

coderedirect
* 0 0013fff0 00000002
0013fff0 00000002 CodeRedirect.obj (coderedirect)

flashexeonly
* 0 0013fff2 00000002
0013fff2 00000002 F28M35x_CSMPasswords.obj (flashexeonly)

ecslpasswds
* 0 0013fff4 00000004
0013fff4 00000004 F28M35x_CSMPasswords.obj (ecslpasswds)

csmpasswds
* 0 0013fff8 00000008
0013fff8 00000008 F28M35x_CSMPasswords.obj (csmpasswds)

C28_MSGRAM_FIFOS
* 1 0003f800 00000200 UNINITIALIZED
0003f800 00000200 mcfifo.obj (C28_MSGRAM_FIFOS)

C28_FIFO_PTRS
* 1 0003fa00 00000028 UNINITIALIZED
0003fa00 00000028 mcfifo.obj (C28_FIFO_PTRS)

shared_def
* 1 0003fb60 00000010 UNINITIALIZED
0003fb60 00000010 shared_def.obj (shared_def)

M3_MSGRAM_FIFOS
* 0 0003fc00 00000200 DSECT
0003fc00 00000200 mcfifo.obj (M3_MSGRAM_FIFOS)

M3_FIFO_PTRS
* 0 0003fe00 00000028 DSECT
0003fe00 00000028 mcfifo.obj (M3_FIFO_PTRS)

lwip_stats
* 0 0003ff80 00000000 DSECT

.macid 0 0003fffc 00000004 DSECT
0003fffc 00000004 emp.obj (.macid)

.econst 0 00105698 000072e6
00105698 0000207d commands.obj (.econst:.string)
00107715 00000001 --HOLE-- [fill = 0]
00107716 000007c4 dspsock_def.obj (.econst:_dspsock_vars)
00107eda 000007b3 control_def.obj (.econst:.string)
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.stack 1 00000050 00000600 UNINITIALIZED
00000050 00000600 --HOLE--

capture_buffer
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enva 1 00100000 00002000 DSECT
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envb 1 00102000 00002000 DSECT
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flashfuncs
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.text 0 0010c97e 00005194
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DevEmuRegsFile
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CsmRegsFile
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AdcResultFile
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Adc1ResultFile
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Adc2ResultFile
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CpuTimer0RegsFile
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CpuTimer1RegsFile
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CpuTimer2RegsFile
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PieCtrlRegsFile
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PieVectTableFile
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EmuKeyVar
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EmuBModeVar
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FlashCallbackVar
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FlashScalingVar
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PieVectTableCopyFile
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DmaRegsFile
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AnalogSysctrlRegsFile
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FlashCtrlRegsFile
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FlashEccRegsFile
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M3PllRegsFile
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RAMRegsFile
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RAMErrRegsFile
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CtoMIpcRegsFile
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McbspaRegsFile
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EPwm1RegsFile
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EPwm2RegsFile
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EPwm3RegsFile
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EPwm4RegsFile
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EPwm9RegsFile
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ECap1RegsFile
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ECap2RegsFile
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ECap3RegsFile
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ECap6RegsFile
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EQep1RegsFile
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EQep2RegsFile
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EQep3RegsFile
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GpioCtrlRegsFile
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GpioG1CtrlRegsFile
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GpioDataRegsFile
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GpioG1DataRegsFile
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GpioTripRegsFile
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GpioG1TripRegsFile
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Comp1RegsFile
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GpioG2DataRegsFile
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BufferDataSection
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vectors 0 003fffc2 00000000 DSECT

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EcslPwlFile
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CsmPwlFile
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MODULE SUMMARY

Module code initialized data uninitialized data
------ ---- ---------------- ------------------
.\
commands.obj 1849 9021 0
coro_test.obj 1625 369 3200
control_def.obj 0 3791 180
dspsock_def.obj 0 3135 282
control.obj 3327 26 26
firmwareupgrde.obj 1734 1093 444
var.obj 2429 770 30
motor.obj 1579 8 1600
emp.obj 2947 45 192
raw_def.obj 0 2845 116
comm_def.obj 0 2834 122
motor_def.obj 0 2585 94
_prtfi.obj 2328 22 0
env.obj 1025 226 1
capture.obj 1016 110 96
comm.obj 1051 153 3
dspsock.obj 952 166 14
faults_def.obj 0 1002 50
capture_def.obj 0 458 538
mcfifo.obj 431 0 552
flash.obj 684 8 0
dev_init.obj 627 0 0
tcnsl.obj 216 69 144
web.obj 0 161 200
faults.obj 86 237 32
root.obj 39 225 20
test_def.obj 0 252 18
console.obj 188 68 0
shared_def.obj 0 226 16
coro.obj 150 10 12
firmwareupgrde_def.obj 0 106 6
snprntf.obj 108 0 0
prntf.obj 76 0 0
co_resume.obj 31 0 0
raw.obj 24 0 0
web_commands.obj 0 14 0
shared.obj 5 0 0
CodeRedirect.obj 2 0 0
+--+--------------------------------+-------+------------------+--------------------+
Total: 24529 30035 7988

.\f28m35x\source\
F28M35x_GlobalVariableDefs.obj 0 0 3893
F28M35x_DefaultIsr.obj 863 0 0
F28M35x_PieVect.obj 38 248 0
F28M35x_CpuTimers.obj 123 0 24
F28M35x_CSMPasswords.obj 0 126 0
F28M35x_PieCtrl.obj 45 0 0
F28M35x_MemCopy.obj 19 0 0
F28M35x_usDelay.obj 8 0 0
F28M35x_CodeStartBranch.obj 2 0 0
+--+--------------------------------+-------+------------------+--------------------+
Total: 1098 374 3917

C:/Project/Soliton Gen2.2/PPS_Software_ver02.02.00/excite_c28/f28m35x/lib/F021_API_C28x_FPU32.lib
FlashStateMachine.obj 1890 0 0
Read.obj 1464 0 0
Program.obj 912 0 0
Utilities.obj 336 0 0
BlankCheck.obj 246 0 0
Init.obj 104 24 0
Async.obj 86 0 0
Verify.obj 60 0 0
+--+--------------------------------+-------+------------------+--------------------+
Total: 5098 24 0

C:\ti\ccsv7\tools\compiler\ti-cgt-c2000_16.9.1.LTS\lib\rts2800_fpu32.lib
strtod.obj 285 32 0
ctype.obj 0 257 0
strtol.obj 222 0 0
strtoul.obj 179 0 0
fd_div28.obj 139 0 0
fs_div28.obj 136 0 0
fd_mpy28.obj 131 0 0
boot28.obj 86 0 0
exit.obj 41 14 6
atoi.obj 49 0 0
fd_cmp28.obj 42 0 0
l_div28.obj 42 0 0
cpy_tbl.obj 36 0 0
fd_tofsfpu32.obj 35 0 0
i_div28.obj 34 0 0
memcpy.obj 30 0 0
strncpy.obj 30 0 0
fs_tofdfpu32.obj 28 0 0
args_main.obj 25 0 0
ll_aox28.obj 24 0 0
strncmp.obj 24 0 0
_lock.obj 9 10 4
strpbrk.obj 13 0 0
memset.obj 12 0 0
isdigit.obj 11 0 0
isspace.obj 11 0 0
u_div28.obj 11 0 0
strcmp.obj 10 0 0
fd_neg28.obj 9 0 0
strlen.obj 8 0 0
errno.obj 0 4 1
strcpy.obj 5 0 0
pre_init.obj 2 0 0
startup.obj 1 0 0
+--+--------------------------------+-------+------------------+--------------------+
Total: 1720 317 11

Stack: 0 0 1536
+--+--------------------------------+-------+------------------+--------------------+
Grand Total: 32445 30750 13452

GLOBAL DATA SYMBOLS: SORTED BY DATA PAGE

address data page name
-------- ---------------- ----
00000050 1 (00000040) __stack

00000880 22 (00000880) _DevEmuRegs

00000ae0 2b (00000ac0) _CsmRegs

00000b00 2c (00000b00) _Adc1Result
00000b00 2c (00000b00) _AdcResult

00000b40 2d (00000b40) _Adc2Result

00000c00 30 (00000c00) _CpuTimer0Regs
00000c08 30 (00000c00) _CpuTimer1Regs
00000c10 30 (00000c00) _CpuTimer2Regs

00000ce0 33 (00000cc0) _PieCtrlRegs

00000d00 34 (00000d00) _PieVectTable

00000e00 38 (00000e00) _PieVectTableCopy

00001000 40 (00001000) _DmaRegs

00001700 5c (00001700) _AnalogSysctrlRegs

00004000 100 (00004000) _FlashCtrlRegs

00004300 10c (00004300) _FlashEccRegs

00004400 110 (00004400) _M3PllRegs

00004900 124 (00004900) _RAMRegs

00004a00 128 (00004a00) _RAMErrRegs

00004e00 138 (00004e00) _CtoMIpcRegs

00005000 140 (00005000) _McbspaRegs

00005100 144 (00005100) _EPwm1Regs

00005180 146 (00005180) _EPwm2Regs

00005200 148 (00005200) _EPwm3Regs

00005280 14a (00005280) _EPwm4Regs

00005300 14c (00005300) _EPwm5Regs

00005380 14e (00005380) _EPwm6Regs

00005400 150 (00005400) _EPwm7Regs

00005480 152 (00005480) _EPwm8Regs

00005500 154 (00005500) _EPwm9Regs

00005a00 168 (00005a00) _ECap1Regs
00005a20 168 (00005a00) _ECap2Regs

00005a40 169 (00005a40) _ECap3Regs
00005a60 169 (00005a40) _ECap4Regs

00005a80 16a (00005a80) _ECap5Regs
00005aa0 16a (00005a80) _ECap6Regs

00005b00 16c (00005b00) _EQep1Regs

00005b40 16d (00005b40) _EQep2Regs

00005b80 16e (00005b80) _EQep3Regs

00005f80 17e (00005f80) _GpioCtrlRegs
00005f80 17e (00005f80) _GpioG1CtrlRegs

00005fc0 17f (00005fc0) _GpioDataRegs
00005fc0 17f (00005fc0) _GpioG1DataRegs
00005fe0 17f (00005fc0) _GpioG1TripRegs
00005fe0 17f (00005fc0) _GpioTripRegs

00006400 190 (00006400) _Comp1Regs
00006420 190 (00006400) _Comp2Regs

00006440 191 (00006440) _Comp3Regs
00006460 191 (00006440) _Comp4Regs

00006480 192 (00006480) _Comp5Regs
000064a0 192 (00006480) _Comp6Regs

00006f80 1be (00006f80) _GpioG2CtrlRegs

00006fc0 1bf (00006fc0) _GpioG2DataRegs

00007010 1c0 (00007000) _SysCtrlRegs

00007040 1c1 (00007040) _SpiaRegs
00007050 1c1 (00007040) _SciaRegs
00007060 1c1 (00007040) _NmiIntruptRegs
00007070 1c1 (00007040) _XIntruptRegs

00007100 1c4 (00007100) _Adc1Regs
00007100 1c4 (00007100) _AdcRegs

00007180 1c6 (00007180) _Adc2Regs

00007900 1e4 (00007900) _I2caRegs

00008000 200 (00008000) _control_update

00008592 216 (00008580) _reset_vars
00008593 216 (00008580) _firmwareupgrde_update

000085ca 217 (000085c0) _Example_CallFlashAPI

00008662 219 (00008640) _Example_Error
00008668 219 (00008640) _Example_Done
0000866b 219 (00008640) _Fapi_BlockRead

00008699 21a (00008680) _Fapi_BlockProgram

00008787 21e (00008780) _Fapi_BlockErase

00008827 220 (00008800) _Flash_Erase_Check
0000883c 220 (00008800) _Control

00008a93 22a (00008a80) _Fapi_serviceWatchdogTimer
00008a95 22a (00008a80) _Fapi_setupEepromSectorEnable

00008ae8 22b (00008ac0) _Fapi_setupBankSectorEnable

00008b0b 22c (00008b00) _FlashGainPump
00008b18 22c (00008b00) _FlashLeavePump

00008b77 22d (00008b40) _sflash_write

00008b94 22e (00008b80) _capture_update

00008c5e 231 (00008c40) _InitFlash

00008c81 232 (00008c80) _faults_update
00008c90 232 (00008c80) _DSP28x_usDelay
00008c94 232 (00008c80) _Fapi_getFsmStatus
00008c9a 232 (00008c80) _Fapi_connectFlashPumpToCpu
00008c9f 232 (00008c80) __Fapi_issueFsmCommand

00008ccc 233 (00008cc0) _Fapi_issueFsmSuspendCommand
00008ceb 233 (00008cc0) _Fapi_writeEwaitValue

00008d0f 234 (00008d00) _Fapi_enableBanksForOtpWrite
00008d24 234 (00008d00) _Fapi_disableBanksForOtpWrite
00008d34 234 (00008d00) __Fapi_setupSectorsForWrite

00008fb0 23e (00008f80) _Fapi_setActiveFlashBank

00008fd4 23f (00008fc0) _Fapi_flushPipeline
00008fea 23f (00008fc0) __Fapi_loopRegionForValueByByte

0000901f 240 (00009000) __Fapi_loopRegionForValue

0000909e 242 (00009080) __Fapi_checkRegionForValue

0000911d 244 (00009100) __Fapi_checkRegionForValueByByte

0000919c 246 (00009180) _Fapi_doMarginRead

00009222 248 (00009200) _print_fifo
0000923e 248 (00009200) _Fapi_doMarginReadByByte

00009280 24a (00009280) _print_buf
000092b0 24a (00009280) _Fapi_issueProgrammingCommand

00009462 251 (00009440) _Fapi_issueProgrammingCommandForEccAddresses
00009478 251 (00009440) __Fapi_divideUnsignedLong

000094a4 252 (00009480) _Fapi_calculateFletcherChecksum

000094d3 253 (000094c0) __Fapi_calculateOtpChecksum
000094de 253 (000094c0) __Fapi_scaleCycleValues
000094eb 253 (000094c0) _Fapi_calculateEcc

00009506 254 (00009500) _Fapi_waitDelay
00009520 254 (00009500) _Fapi_doBlankCheck

00009561 255 (00009540) _Fapi_doBlankCheckByByte

0000959b 256 (00009580) _Fapi_isAddressEcc

000095c0 257 (000095c0) _Fapi_remapEccAddress

00009600 258 (00009600) _Fapi_checkFsmForReady
0000960c 258 (00009600) _Fapi_initializeAPI

00009640 259 (00009640) _Fapi_issueAsyncCommandWithAddress
00009660 259 (00009640) _Fapi_issueAsyncCommand
0000966b 259 (00009640) _Fapi_doVerify
0000967a 259 (00009640) _Fapi_doVerifyByByte

0000968a 25a (00009680) _Fapi_GlobalInit

00009e80 27a (00009e80) _motor_EOT
00009e81 27a (00009e80) _gu8BuzzerEn

0000a4c0 293 (0000a4c0) _capture_def

0000a6fa 29b (0000a6c0) _firmwareupgrde_def

0000a700 29c (0000a700) _dspsock_def

0000a81a 2a0 (0000a800) _dspbuf_idx
0000a81c 2a0 (0000a800) _dspbufs
0000a838 2a0 (0000a800) ___TI_enable_exit_profile_output
0000a83a 2a0 (0000a800) ___TI_cleanup_ptr
0000a83c 2a0 (0000a800) ___TI_dtors_ptr
0000a83e 2a0 (0000a800) __lock

0000a840 2a1 (0000a840) _errs

0000a880 2a2 (0000a880) _web

0000a908 2a4 (0000a900) _faults_def
0000a93e 2a4 (0000a900) __unlock

0000a940 2a5 (0000a940) _g_FirstTimeBoot
0000a941 2a5 (0000a940) _gu8OneTimeExecute
0000a942 2a5 (0000a940) _gu8IgniteKill
0000a944 2a5 (0000a940) _u16ReadTestData
0000a948 2a5 (0000a940) _noSteps
0000a94a 2a5 (0000a940) _u32PulseCount
0000a950 2a5 (0000a940) _epwm5_info
0000a95a 2a5 (0000a940) _mcfifo_serial0
0000a968 2a5 (0000a940) _mcfifo_www

0000a980 2a6 (0000a980) _mcfifo_console

0000a9c0 2a7 (0000a9c0) _static_array

0000aa00 2a8 (0000aa00) _control_def

0000aab4 2aa (0000aa80) _co_current
0000aab6 2aa (0000aa80) _co_main

0000aac0 2ab (0000aac0) _tcnsl

0000ab50 2ad (0000ab40) _retval
0000ab51 2ad (0000ab40) _u8IgbtLoop
0000ab52 2ad (0000ab40) _u8IgbtBufFul
0000ab53 2ad (0000ab40) _onetimeflag
0000ab54 2ad (0000ab40) _prev_total_pulse_cnt
0000ab56 2ad (0000ab40) _g_fIgbt_on_us
0000ab6a 2ad (0000ab40) _root_def
0000ab7e 2ad (0000ab40) _errno

0000ab81 2ae (0000ab80) _u32CurrentActivePartition
0000ab84 2ae (0000ab80) _Buffer32

0000abc0 2af (0000abc0) _c28_r_w_array

0000ac00 2b0 (0000ac00) _comm_def

0000ac80 2b2 (0000ac80) _raw_def

0000ad60 2b5 (0000ad40) _CpuTimer1
0000ad68 2b5 (0000ad40) _CpuTimer2
0000ad70 2b5 (0000ad40) _CpuTimer0

0000ad80 2b6 (0000ad80) _motor_def

0000adde 2b7 (0000adc0) _test_def
0000adf0 2b7 (0000adc0) _mcfifo_dspsock

0000c000 300 (0000c000) _c28_r_array

0000c040 301 (0000c040) _Buffer

0000d000 340 (0000d000) _capture_buffer

0003f800 fe0 (0003f800) _c28_msgram_fifos

0003fb60 fed (0003fb40) _shared_def

0003fc00 ff0 (0003fc00) _m3_msgram_fifos

0003fffc fff (0003ffc0) _ethernet_macid1
0003fffe fff (0003ffc0) _ethernet_macid0

00100000 4000 (00100000) _enva

00102000 4080 (00102000) _envb

0010bd58 42f5 (0010bd40) __ctypes_

0010bf5a 42fd (0010bf40) _PieVectTableInit

0010c79c 431e (0010c780) _flash_sector_api

0010c85a 4321 (0010c840) _capture_struct
0010c868 4321 (0010c840) _comm_struct
0010c876 4321 (0010c840) _control_struct

0010c884 4322 (0010c880) _dspsock_struct
0010c892 4322 (0010c880) _faults_struct
0010c8a0 4322 (0010c880) _firmwareupgrde_struct
0010c8ae 4322 (0010c880) _motor_struct
0010c8bc 4322 (0010c880) _raw_struct

0010c8ca 4323 (0010c8c0) _root_struct
0010c8d8 4323 (0010c8c0) _shared_struct
0010c8e6 4323 (0010c8c0) _test_struct

0013fff2 4fff (0013ffc0) _FlashExeOnly
0013fff4 4fff (0013ffc0) _EcslPwl
0013fff8 4fff (0013ffc0) _CsmPwl

GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name

page address name
---- ------- ----
abs ffffffff .text
0 001118dd C$$EXIT
0 00111889 FD$$CMP
0 001114d4 FD$$DIV
0 001115e7 FD$$MPY
0 00111af4 FD$$NEG
0 00111977 FD$$TOFS
0 0011155f FS$$DIV
0 00111a17 FS$$TOFD
0 0011199a I$$DIV
0 001119ab I$$MOD
0 001118b3 L$$DIV
0 001118c2 L$$MOD
0 00111a64 LL$$AND
0 00111a6c LL$$OR
0 00111a74 LL$$XOR
0 00111ad6 U$$DIV
0 00111adb U$$MOD
0 001118d0 UL$$DIV
0 001118d7 UL$$MOD
0 00110181 _ADCINT1_ISR
0 0011018b _ADCINT2_ISR
0 00110357 _ADCINT3_ISR
0 00110361 _ADCINT4_ISR
0 0011036b _ADCINT5_ISR
0 00110375 _ADCINT6_ISR
0 0011037f _ADCINT7_ISR
0 00110389 _ADCINT8_ISR
0 0010f0e0 _ADC_Config
1 00007100 _Adc1Regs
1 00000b00 _Adc1Result
1 00007180 _Adc2Regs
1 00000b40 _Adc2Result
1 00007100 _AdcRegs
1 00000b00 _AdcResult
1 00001700 _AnalogSysctrlRegs
1 0000c040 _Buffer
1 0000ab84 _Buffer32
0 001103cf _CFLFSM_ISR
0 001103c5 _CFLSINGERR_ISR
0 001103e3 _CRAMACCVIOL_ISR
0 001103d9 _CRAMSINGERR_ISR
1 00006400 _Comp1Regs
1 00006420 _Comp2Regs
1 00006440 _Comp3Regs
1 00006460 _Comp4Regs
1 00006480 _Comp5Regs
1 000064a0 _Comp6Regs
0 001116ab _ConfigCpuTimer
0 0000883c _Control
1 0000ad70 _CpuTimer0
1 00000c00 _CpuTimer0Regs
1 0000ad60 _CpuTimer1
1 00000c08 _CpuTimer1Regs
1 0000ad68 _CpuTimer2
1 00000c10 _CpuTimer2Regs
1 0013fff8 _CsmPwl
1 00000ae0 _CsmRegs
0 00110892 _CsmUnlock
1 00004e00 _CtoMIpcRegs
0 001100d7 _DATALOG_ISR
0 001102f3 _DINTCH1_ISR
0 001102fd _DINTCH2_ISR
0 00110307 _DINTCH3_ISR
0 00110311 _DINTCH4_ISR
0 0011031b _DINTCH5_ISR
0 00110325 _DINTCH6_ISR
0 00008c90 _DSP28x_usDelay
1 00000880 _DevEmuRegs
0 00110686 _DeviceInit
1 00001000 _DmaRegs
0 0011025d _ECAP1_INT_ISR
0 00110267 _ECAP2_INT_ISR
0 00110271 _ECAP3_INT_ISR
0 0011027b _ECAP4_INT_ISR
0 00110285 _ECAP5_INT_ISR
0 0011028f _ECAP6_INT_ISR
1 00005a00 _ECap1Regs
1 00005a20 _ECap2Regs
1 00005a40 _ECap3Regs
1 00005a60 _ECap4Regs
1 00005a80 _ECap5Regs
1 00005aa0 _ECap6Regs
0 00110401 _EMPTY_ISR
0 001100eb _EMUINT_ISR
0 0011020d _EPWM1_INT_ISR
0 001101bd _EPWM1_TZINT_ISR
0 00110217 _EPWM2_INT_ISR
0 001101c7 _EPWM2_TZINT_ISR
0 00110221 _EPWM3_INT_ISR
0 001101d1 _EPWM3_TZINT_ISR
0 0011022b _EPWM4_INT_ISR
0 001101db _EPWM4_TZINT_ISR
0 00110235 _EPWM5_INT_ISR
0 001101e5 _EPWM5_TZINT_ISR
0 0011023f _EPWM6_INT_ISR
0 001101ef _EPWM6_TZINT_ISR
0 00110249 _EPWM7_INT_ISR
0 001101f9 _EPWM7_TZINT_ISR
0 00110253 _EPWM8_INT_ISR
0 00110203 _EPWM8_TZINT_ISR
0 001102c1 _EPWM9_INT_ISR
0 00110299 _EPWM9_TZINT_ISR
1 00005100 _EPwm1Regs
1 00005180 _EPwm2Regs
1 00005200 _EPwm3Regs
1 00005280 _EPwm4Regs
1 00005300 _EPwm5Regs
1 00005380 _EPwm6Regs
1 00005400 _EPwm7Regs
1 00005480 _EPwm8Regs
1 00005500 _EPwm9Regs
0 001102a3 _EQEP1_INT_ISR
0 001102ad _EQEP2_INT_ISR
0 001102b7 _EQEP3_INT_ISR
1 00005b00 _EQep1Regs
1 00005b40 _EQep2Regs
1 00005b80 _EQep3Regs
1 0013fff4 _EcslPwl
0 00111880 _EnableInterrupts
0 000085ca _Example_CallFlashAPI
0 00008668 _Example_Done
0 00008662 _Example_Error
0 00110dde _FMSTAT_Fail
0 00008787 _Fapi_BlockErase
0 00008699 _Fapi_BlockProgram
0 0000866b _Fapi_BlockRead
0 0000968a _Fapi_GlobalInit
0 000094eb _Fapi_calculateEcc
0 000094a4 _Fapi_calculateFletcherChecksum
0 00009600 _Fapi_checkFsmForReady
0 00008c9a _Fapi_connectFlashPumpToCpu
0 00008d24 _Fapi_disableBanksForOtpWrite
0 00009520 _Fapi_doBlankCheck
0 00009561 _Fapi_doBlankCheckByByte
0 0000919c _Fapi_doMarginRead
0 0000923e _Fapi_doMarginReadByByte
0 0000966b _Fapi_doVerify
0 0000967a _Fapi_doVerifyByByte
0 00008d0f _Fapi_enableBanksForOtpWrite
0 00008fd4 _Fapi_flushPipeline
0 00008c94 _Fapi_getFsmStatus
0 0000960c _Fapi_initializeAPI
0 0000959b _Fapi_isAddressEcc
0 00009660 _Fapi_issueAsyncCommand
0 00009640 _Fapi_issueAsyncCommandWithAddress
0 00008ccc _Fapi_issueFsmSuspendCommand
0 000092b0 _Fapi_issueProgrammingCommand
0 00009462 _Fapi_issueProgrammingCommandForEccAddresses
0 000095c0 _Fapi_remapEccAddress
0 00008a93 _Fapi_serviceWatchdogTimer
0 00008fb0 _Fapi_setActiveFlashBank
0 00008ae8 _Fapi_setupBankSectorEnable
0 00008a95 _Fapi_setupEepromSectorEnable
0 00009506 _Fapi_waitDelay
0 00008ceb _Fapi_writeEwaitValue
1 00004000 _FlashCtrlRegs
1 00004300 _FlashEccRegs
1 0013fff2 _FlashExeOnly
0 00008b0b _FlashGainPump
0 00008b18 _FlashLeavePump
0 00008827 _Flash_Erase_Check
1 00005f80 _GpioCtrlRegs
1 00005fc0 _GpioDataRegs
1 00005f80 _GpioG1CtrlRegs
1 00005fc0 _GpioG1DataRegs
1 00005fe0 _GpioG1TripRegs
1 00006f80 _GpioG2CtrlRegs
1 00006fc0 _GpioG2DataRegs
1 00005fe0 _GpioTripRegs
0 0011032f _I2CINT1A_ISR
0 00110339 _I2CINT2A_ISR
1 00007900 _I2caRegs
0 001100ff _ILLEGAL_ISR
0 001100c3 _INT13_ISR
0 001100cd _INT14_ISR
0 0011166a _InitCpuTimers
0 0010f2c5 _InitECapture
0 00008c5e _InitFlash
0 0011185c _InitPieCtrl
0 0011192d _InitPieVectTable
0 00110dfb _InitiateFwUpgValidity
0 001103f7 _LUF_ISR
0 001103ed _LVF_ISR
0 0010f552 _M3In0
0 0010f66f _M3Out0
1 00004400 _M3PllRegs
0 001102df _MRINTA_ISR
0 00110393 _MTOCIPC_INT1_ISR
0 0011039d _MTOCIPC_INT2_ISR
0 001103a7 _MTOCIPC_INT3_ISR
0 001103b1 _MTOCIPC_INT4_ISR
0 001102e9 _MXINTA_ISR
1 00005000 _McbspaRegs
0 00111a94 _MemCopy
0 001100f5 _NMI_ISR
1 00007060 _NmiIntruptRegs
0 0011040e _PIE_RESERVED
0 0010f359 _PWM_Config
1 00000ce0 _PieCtrlRegs
1 00000d00 _PieVectTable
1 00000e00 _PieVectTableCopy
0 0010bf5a _PieVectTableInit
1 00004a00 _RAMErrRegs
1 00004900 _RAMRegs
0 001100e1 _RTOSINT_ISR
abs 00105698 _RamfuncsLoadEnd
abs 00001696 _RamfuncsLoadSize
abs 00104002 _RamfuncsLoadStart
abs 00008000 _RamfuncsRunStart
0 00110343 _SCIRXINTA_ISR
0 0011034d _SCITXINTA_ISR
0 001102cb _SPIRXINTA_ISR
0 001102d5 _SPITXINTA_ISR
1 00007050 _SciaRegs
0 00110de1 _Shared_Ram_dataRead_c28
1 00007040 _SpiaRegs
1 00007010 _SysCtrlRegs
0 001101a9 _TINT0_ISR
0 00110163 _USER10_ISR
0 0011016d _USER11_ISR
0 00110177 _USER12_ISR
0 00110109 _USER1_ISR
0 00110113 _USER2_ISR
0 0011011d _USER3_ISR
0 00110127 _USER4_ISR
0 00110131 _USER5_ISR
0 0011013b _USER6_ISR
0 00110145 _USER7_ISR
0 0011014f _USER8_ISR
0 00110159 _USER9_ISR
0 001101b3 _WAKEINT_ISR
0 00110ecc _WriteHexRecord2Flash
0 00110195 _XINT1_ISR
0 0011019f _XINT2_ISR
0 001103bb _XINT3_ISR
1 00007070 _XIntruptRegs
0 000094d3 __Fapi_calculateOtpChecksum
0 0000909e __Fapi_checkRegionForValue
0 0000911d __Fapi_checkRegionForValueByByte
0 00009478 __Fapi_divideUnsignedLong
0 00008c9f __Fapi_issueFsmCommand
0 0000901f __Fapi_loopRegionForValue
0 00008fea __Fapi_loopRegionForValueByByte
0 000094de __Fapi_scaleCycleValues
0 00008d34 __Fapi_setupSectorsForWrite
1 00000650 __STACK_END
abs 00000600 __STACK_SIZE
1 0000a83a ___TI_cleanup_ptr
1 0000a83c ___TI_dtors_ptr
1 0000a838 ___TI_enable_exit_profile_output
abs ffffffff ___TI_pprof_out_hndl
abs ffffffff ___TI_prof_data_size
abs ffffffff ___TI_prof_data_start
abs ffffffff ___binit__
abs ffffffff ___c_args__
0 00111b12 ___cinit__
0 00111469 ___co_wrap
abs ffffffff ___etext__
abs ffffffff ___pinit__
0 0010db54 ___prtfi
abs ffffffff ___text__
0 00111a33 __args_main
0 0010bd58 __ctypes_
1 0000a83e __lock
0 00111af3 __nop
0 00111aef __register_lock
0 00111aeb __register_unlock
1 00000050 __stack
0 00111b11 __system_post_cinit
0 00111b0f __system_pre_init
1 0000a93e __unlock
0 001118dd _abort
0 00110c82 _adc1_isr
0 0011182b _atoi
1 0003f800 _c28_msgram_fifos
1 0000c000 _c28_r_array
1 0000abc0 _c28_r_w_array
0 00111751 _c_int00
0 0000d000 _capture_buffer
1 0000a4c0 _capture_def
0 00110540 _capture_init
0 0010c85a _capture_struct
0 00008b94 _capture_update
0 0010efad _cmd_buzzer_off
0 0010efa3 _cmd_buzzer_on
0 0011058d _cmd_capture
0 00110585 _cmd_capture_clear
0 001105c7 _cmd_capture_ls
0 001105f2 _cmd_capture_start
0 0011067d _cmd_capture_stop
0 0010d150 _cmd_cd
0 00110a7c _cmd_clear
0 0010fc01 _cmd_closeenv
0 0010e955 _cmd_corotest
0 0010dec3 _cmd_disable
0 0010e154 _cmd_disable_HV
0 00110057 _cmd_dspsock_ip
0 0010ef9a _cmd_empty
0 0010dea5 _cmd_enable
0 0010e101 _cmd_enable_HV
0 0010fcb6 _cmd_env
0 0010dee0 _cmd_getchargevolt
0 0010df6d _cmd_getcriticalparams
0 0010def8 _cmd_getigbtvalue
0 0010dfb0 _cmd_getnoncriticalparams
0 0010ef90 _cmd_goi
0 0010dcf3 _cmd_help
0 00110a4b _cmd_ignite
0 0010ef86 _cmd_installed
0 00110a69 _cmd_kill
0 0010fcd7 _cmd_loadenv
0 0010d0e2 _cmd_ls
0 0010d111 _cmd_lsall
0 0010efb6 _cmd_motorhome
0 0010ddd0 _cmd_motormove
0 0010dd38 _cmd_motorstatus
0 0010fbe2 _cmd_openenv
0 0010d140 _cmd_pwd
0 0010d200 _cmd_read
0 0010e19d _cmd_read_gpio
0 0010d2c5 _cmd_readb
0 0010e072 _cmd_readfan
0 0010ef7c _cmd_remove
0 0010d0b1 _cmd_set
0 0010df3a _cmd_setchargevolt
0 0010fc29 _cmd_setenv
0 0010dff0 _cmd_setfan
0 0010df10 _cmd_setproctype
0 0010d092 _cmd_show
0 00111211 _cmd_tcnsl_status
0 001112cc _cmd_test
0 0010fc88 _cmd_unsetenv
0 0010dd2a _cmd_version
0 001117f4 _cmd_why
0 0010f865 _cmd_writeFPGA
0 0010e1f7 _cmd_write_gpio
0 00111479 _co_create
1 0000aab4 _co_current
0 0010e400 _co_delete
0 0010e449 _co_exit
0 0010e428 _co_exit_to
1 0000aab6 _co_main
0 001119bc _co_resume_asm
1 0000ac00 _comm_def
0 0010f808 _comm_motor_command
0 0010f6f6 _comm_send_message
0 0010f740 _comm_start_pulse
0 0010c868 _comm_struct
0 0010dcc4 _commands_exec
0 0010dc13 _commands_lookup
0 0010dd1b _commands_usage
0 00111243 _console_busy
0 001112b9 _console_check_output
0 0011123c _console_flush
0 0011123b _console_init
0 001112b6 _console_read_ack
0 001112b1 _console_read_nonblock
0 001112b3 _console_read_ready
0 001112a4 _console_update
0 00111246 _console_write
0 00111262 _console_write_block
1 0000aa00 _control_def
0 00110a3e _control_init
0 0010c876 _control_struct
0 00008000 _control_update
0 0010db3d _convert_result
0 00111953 _copy_in
0 001117a7 _cprntf_putchars
0 0010f533 _crc4word
1 0000a81a _dspbuf_idx
1 0000a81c _dspbufs
1 0000a700 _dspsock_def
0 0010ffd8 _dspsock_init
0 0010c884 _dspsock_struct
0 0010ff8c _dspsock_update
0 00110cdb _ecap1_isr
0 00110d22 _ecap2_isr
0 00110d69 _ecap3_isr
0 0010faa8 _env_iter
0 0010fbcc _env_load
0 0010fb3f _env_set
0 00100000 _enva
0 00102000 _envb
1 0000a950 _epwm5_info
0 00110c3b _epwm5_isr
1 0000ab7e _errno
1 0000a840 _errs
0 0003fffe _ethernet_macid0
0 0003fffc _ethernet_macid1
0 001118df _exit
1 0000a908 _faults_def
0 001117f3 _faults_init
0 0010c892 _faults_struct
0 00008c81 _faults_update
0 0010e3d0 _fifo_get
0 0010e389 _fifo_init
0 0010e3a5 _fifo_put
1 0000a6fa _firmwareupgrde_def
0 0010c8a0 _firmwareupgrde_struct
0 00008593 _firmwareupgrde_update
0 0010c79c _flash_sector_api
0 0010cac5 _float2vp
1 0000a940 _g_FirstTimeBoot
1 0000ab56 _g_fIgbt_on_us
1 00009e81 _gu8BuzzerEn
1 0000a942 _gu8IgniteKill
1 0000a941 _gu8OneTimeExecute
0 0010f6a8 _hex2ascii16
0 0010ffec _inet_addr
0 0010cdea _int_val
0 00111ac0 _isdigit
0 00111acb _isspace
0 0010d2fb _ltoa
0 0003fc00 _m3_msgram_fifos
0 0010efe9 _main
0 0010dc4f _make_argc
0 00110bb3 _mcfifo_available
1 0000a980 _mcfifo_console
1 0000adf0 _mcfifo_dspsock
0 00110bd3 _mcfifo_empty
0 00110b9a _mcfifo_get_elems
0 00110b6f _mcfifo_get_nonblock
0 00110c0f _mcfifo_get_nonblock_chars
0 00110aa4 _mcfifo_init
0 00110b48 _mcfifo_put_nonblock
0 00110be8 _mcfifo_put_nonblock_chars
1 0000a95a _mcfifo_serial0
1 0000a968 _mcfifo_www
0 001119db _memcpy
0 00111ab4 _memset
1 00009e80 _motor_EOT
1 0000ad80 _motor_def
0 0010ef5c _motor_init
0 0010ea8c _motor_move
0 0010ea84 _motor_move_limit
0 0010c8ae _motor_struct
0 0010ee9b _motor_update
1 0000a948 _noSteps
1 0000ab53 _onetimeflag
1 0000ab54 _prev_total_pulse_cnt
0 001117f0 _prflush
1 00009280 _print_buf
1 00009222 _print_fifo
0 001117e3 _prntf
1 0000ac80 _raw_def
0 00111a60 _raw_init
0 0010c8bc _raw_struct
0 00111a4c _raw_update
0 0010d266 _readb
0 00110d87 _redundantFlow_Timer
0 00008592 _reset_vars
1 0000ab50 _retval
1 0000ab6a _root_def
0 0010c8ca _root_struct
0 00110418 _rsvd_ISR
0 00111427 _sflash_read
0 00111401 _sflash_valid
0 00008b77 _sflash_write
1 0003fb60 _shared_def
0 00111b0a _shared_init
0 0010c8d8 _shared_struct
0 0010efc8 _sleep
0 00111741 _snprntf
1 0000a9c0 _static_array
0 00111ae1 _strcmp
0 00111b05 _strcpy
0 00111afd _strlen
0 00111a7c _strncmp
0 001119f9 _strncpy
0 00111aa7 _strpbrk
0 00110f52 _strtod
0 00110f52 _strtof
0 0011106f _strtol
0 001112e1 _strtoul
0 00111906 _struct_lookup
0 0010e50a _t1
0 0010e4df _t1_1
0 0010e58a _t2
0 0010e54c _t2_1
0 0010e571 _t2_2
0 0010e5fb _t3
0 0010e5db _t3_1
0 0010e672 _t4
0 0010e647 _t4_1
0 0010e78b _t5
0 0010e6ab _t5_1
0 0010e7f9 _t6
0 0010e7e9 _t6_1
0 0010e858 _t7
0 0010e83c _t7_1
0 0010e8d7 _t8
0 0010e89f _t8_1
0 0010e8bc _t8_2
0 0010e92a _t9
0 0010e910 _t9_1
1 0000aac0 _tcnsl
0 0011115b _tcnsl_init
0 001111c1 _tcnsl_read
1 0000adde _test_def
0 0010c8e6 _test_struct
1 0000a944 _u16ReadTestData
1 0000ab81 _u32CurrentActivePartition
1 0000a94a _u32PulseCount
1 0000ab52 _u8IgbtBufFul
1 0000ab51 _u8IgbtLoop
0 0010ce18 _uint_val
0 0010cb19 _ulong2vp
0 0010d1df _valid_int
0 0010d1bc _var_init
0 0010cf9f _var_locate
0 0010cffb _var_lookup
0 0010cb5c _var_print_byvar
0 0010ce37 _var_set_byvar
0 0010cca2 _var_snprint_byvar
0 0010c9dc _var_type_id
0 0010d1c2 _varname2struct
0 001117d2 _vfprntf
0 0010ca73 _vp2float
0 0010ca2f _vp2ulong
1 0000a880 _web
abs ffffffff binit
0 00111b12 cinit
0 0013fff0 code_redirect
0 00104000 code_start
abs ffffffff etext
abs ffffffff pinit

GLOBAL SYMBOLS: SORTED BY Symbol Address

page address name
---- ------- ----
0 00008000 _control_update
0 00008592 _reset_vars
0 00008593 _firmwareupgrde_update
0 000085ca _Example_CallFlashAPI
0 00008662 _Example_Error
0 00008668 _Example_Done
0 0000866b _Fapi_BlockRead
0 00008699 _Fapi_BlockProgram
0 00008787 _Fapi_BlockErase
0 00008827 _Flash_Erase_Check
0 0000883c _Control
0 00008a93 _Fapi_serviceWatchdogTimer
0 00008a95 _Fapi_setupEepromSectorEnable
0 00008ae8 _Fapi_setupBankSectorEnable
0 00008b0b _FlashGainPump
0 00008b18 _FlashLeavePump
0 00008b77 _sflash_write
0 00008b94 _capture_update
0 00008c5e _InitFlash
0 00008c81 _faults_update
0 00008c90 _DSP28x_usDelay
0 00008c94 _Fapi_getFsmStatus
0 00008c9a _Fapi_connectFlashPumpToCpu
0 00008c9f __Fapi_issueFsmCommand
0 00008ccc _Fapi_issueFsmSuspendCommand
0 00008ceb _Fapi_writeEwaitValue
0 00008d0f _Fapi_enableBanksForOtpWrite
0 00008d24 _Fapi_disableBanksForOtpWrite
0 00008d34 __Fapi_setupSectorsForWrite
0 00008fb0 _Fapi_setActiveFlashBank
0 00008fd4 _Fapi_flushPipeline
0 00008fea __Fapi_loopRegionForValueByByte
0 0000901f __Fapi_loopRegionForValue
0 0000909e __Fapi_checkRegionForValue
0 0000911d __Fapi_checkRegionForValueByByte
0 0000919c _Fapi_doMarginRead
0 0000923e _Fapi_doMarginReadByByte
0 000092b0 _Fapi_issueProgrammingCommand
0 00009462 _Fapi_issueProgrammingCommandForEccAddresses
0 00009478 __Fapi_divideUnsignedLong
0 000094a4 _Fapi_calculateFletcherChecksum
0 000094d3 __Fapi_calculateOtpChecksum
0 000094de __Fapi_scaleCycleValues
0 000094eb _Fapi_calculateEcc
0 00009506 _Fapi_waitDelay
0 00009520 _Fapi_doBlankCheck
0 00009561 _Fapi_doBlankCheckByByte
0 0000959b _Fapi_isAddressEcc
0 000095c0 _Fapi_remapEccAddress
0 00009600 _Fapi_checkFsmForReady
0 0000960c _Fapi_initializeAPI
0 00009640 _Fapi_issueAsyncCommandWithAddress
0 00009660 _Fapi_issueAsyncCommand
0 0000966b _Fapi_doVerify
0 0000967a _Fapi_doVerifyByByte
0 0000968a _Fapi_GlobalInit
0 0000d000 _capture_buffer
0 0003fc00 _m3_msgram_fifos
0 0003fffc _ethernet_macid1
0 0003fffe _ethernet_macid0
0 00100000 _enva
0 00102000 _envb
0 00104000 code_start
0 0010bd58 __ctypes_
0 0010bf5a _PieVectTableInit
0 0010c79c _flash_sector_api
0 0010c85a _capture_struct
0 0010c868 _comm_struct
0 0010c876 _control_struct
0 0010c884 _dspsock_struct
0 0010c892 _faults_struct
0 0010c8a0 _firmwareupgrde_struct
0 0010c8ae _motor_struct
0 0010c8bc _raw_struct
0 0010c8ca _root_struct
0 0010c8d8 _shared_struct
0 0010c8e6 _test_struct
0 0010c9dc _var_type_id
0 0010ca2f _vp2ulong
0 0010ca73 _vp2float
0 0010cac5 _float2vp
0 0010cb19 _ulong2vp
0 0010cb5c _var_print_byvar
0 0010cca2 _var_snprint_byvar
0 0010cdea _int_val
0 0010ce18 _uint_val
0 0010ce37 _var_set_byvar
0 0010cf9f _var_locate
0 0010cffb _var_lookup
0 0010d092 _cmd_show
0 0010d0b1 _cmd_set
0 0010d0e2 _cmd_ls
0 0010d111 _cmd_lsall
0 0010d140 _cmd_pwd
0 0010d150 _cmd_cd
0 0010d1bc _var_init
0 0010d1c2 _varname2struct
0 0010d1df _valid_int
0 0010d200 _cmd_read
0 0010d266 _readb
0 0010d2c5 _cmd_readb
0 0010d2fb _ltoa
0 0010db3d _convert_result
0 0010db54 ___prtfi
0 0010dc13 _commands_lookup
0 0010dc4f _make_argc
0 0010dcc4 _commands_exec
0 0010dcf3 _cmd_help
0 0010dd1b _commands_usage
0 0010dd2a _cmd_version
0 0010dd38 _cmd_motorstatus
0 0010ddd0 _cmd_motormove
0 0010dea5 _cmd_enable
0 0010dec3 _cmd_disable
0 0010dee0 _cmd_getchargevolt
0 0010def8 _cmd_getigbtvalue
0 0010df10 _cmd_setproctype
0 0010df3a _cmd_setchargevolt
0 0010df6d _cmd_getcriticalparams
0 0010dfb0 _cmd_getnoncriticalparams
0 0010dff0 _cmd_setfan
0 0010e072 _cmd_readfan
0 0010e101 _cmd_enable_HV
0 0010e154 _cmd_disable_HV
0 0010e19d _cmd_read_gpio
0 0010e1f7 _cmd_write_gpio
0 0010e389 _fifo_init
0 0010e3a5 _fifo_put
0 0010e3d0 _fifo_get
0 0010e400 _co_delete
0 0010e428 _co_exit_to
0 0010e449 _co_exit
0 0010e4df _t1_1
0 0010e50a _t1
0 0010e54c _t2_1
0 0010e571 _t2_2
0 0010e58a _t2
0 0010e5db _t3_1
0 0010e5fb _t3
0 0010e647 _t4_1
0 0010e672 _t4
0 0010e6ab _t5_1
0 0010e78b _t5
0 0010e7e9 _t6_1
0 0010e7f9 _t6
0 0010e83c _t7_1
0 0010e858 _t7
0 0010e89f _t8_1
0 0010e8bc _t8_2
0 0010e8d7 _t8
0 0010e910 _t9_1
0 0010e92a _t9
0 0010e955 _cmd_corotest
0 0010ea84 _motor_move_limit
0 0010ea8c _motor_move
0 0010ee9b _motor_update
0 0010ef5c _motor_init
0 0010ef7c _cmd_remove
0 0010ef86 _cmd_installed
0 0010ef90 _cmd_goi
0 0010ef9a _cmd_empty
0 0010efa3 _cmd_buzzer_on
0 0010efad _cmd_buzzer_off
0 0010efb6 _cmd_motorhome
0 0010efc8 _sleep
0 0010efe9 _main
0 0010f0e0 _ADC_Config
0 0010f2c5 _InitECapture
0 0010f359 _PWM_Config
0 0010f533 _crc4word
0 0010f552 _M3In0
0 0010f66f _M3Out0
0 0010f6a8 _hex2ascii16
0 0010f6f6 _comm_send_message
0 0010f740 _comm_start_pulse
0 0010f808 _comm_motor_command
0 0010f865 _cmd_writeFPGA
0 0010faa8 _env_iter
0 0010fb3f _env_set
0 0010fbcc _env_load
0 0010fbe2 _cmd_openenv
0 0010fc01 _cmd_closeenv
0 0010fc29 _cmd_setenv
0 0010fc88 _cmd_unsetenv
0 0010fcb6 _cmd_env
0 0010fcd7 _cmd_loadenv
0 0010ff8c _dspsock_update
0 0010ffd8 _dspsock_init
0 0010ffec _inet_addr
0 00110057 _cmd_dspsock_ip
0 001100c3 _INT13_ISR
0 001100cd _INT14_ISR
0 001100d7 _DATALOG_ISR
0 001100e1 _RTOSINT_ISR
0 001100eb _EMUINT_ISR
0 001100f5 _NMI_ISR
0 001100ff _ILLEGAL_ISR
0 00110109 _USER1_ISR
0 00110113 _USER2_ISR
0 0011011d _USER3_ISR
0 00110127 _USER4_ISR
0 00110131 _USER5_ISR
0 0011013b _USER6_ISR
0 00110145 _USER7_ISR
0 0011014f _USER8_ISR
0 00110159 _USER9_ISR
0 00110163 _USER10_ISR
0 0011016d _USER11_ISR
0 00110177 _USER12_ISR
0 00110181 _ADCINT1_ISR
0 0011018b _ADCINT2_ISR
0 00110195 _XINT1_ISR
0 0011019f _XINT2_ISR
0 001101a9 _TINT0_ISR
0 001101b3 _WAKEINT_ISR
0 001101bd _EPWM1_TZINT_ISR
0 001101c7 _EPWM2_TZINT_ISR
0 001101d1 _EPWM3_TZINT_ISR
0 001101db _EPWM4_TZINT_ISR
0 001101e5 _EPWM5_TZINT_ISR
0 001101ef _EPWM6_TZINT_ISR
0 001101f9 _EPWM7_TZINT_ISR
0 00110203 _EPWM8_TZINT_ISR
0 0011020d _EPWM1_INT_ISR
0 00110217 _EPWM2_INT_ISR
0 00110221 _EPWM3_INT_ISR
0 0011022b _EPWM4_INT_ISR
0 00110235 _EPWM5_INT_ISR
0 0011023f _EPWM6_INT_ISR
0 00110249 _EPWM7_INT_ISR
0 00110253 _EPWM8_INT_ISR
0 0011025d _ECAP1_INT_ISR
0 00110267 _ECAP2_INT_ISR
0 00110271 _ECAP3_INT_ISR
0 0011027b _ECAP4_INT_ISR
0 00110285 _ECAP5_INT_ISR
0 0011028f _ECAP6_INT_ISR
0 00110299 _EPWM9_TZINT_ISR
0 001102a3 _EQEP1_INT_ISR
0 001102ad _EQEP2_INT_ISR
0 001102b7 _EQEP3_INT_ISR
0 001102c1 _EPWM9_INT_ISR
0 001102cb _SPIRXINTA_ISR
0 001102d5 _SPITXINTA_ISR
0 001102df _MRINTA_ISR
0 001102e9 _MXINTA_ISR
0 001102f3 _DINTCH1_ISR
0 001102fd _DINTCH2_ISR
0 00110307 _DINTCH3_ISR
0 00110311 _DINTCH4_ISR
0 0011031b _DINTCH5_ISR
0 00110325 _DINTCH6_ISR
0 0011032f _I2CINT1A_ISR
0 00110339 _I2CINT2A_ISR
0 00110343 _SCIRXINTA_ISR
0 0011034d _SCITXINTA_ISR
0 00110357 _ADCINT3_ISR
0 00110361 _ADCINT4_ISR
0 0011036b _ADCINT5_ISR
0 00110375 _ADCINT6_ISR
0 0011037f _ADCINT7_ISR
0 00110389 _ADCINT8_ISR
0 00110393 _MTOCIPC_INT1_ISR
0 0011039d _MTOCIPC_INT2_ISR
0 001103a7 _MTOCIPC_INT3_ISR
0 001103b1 _MTOCIPC_INT4_ISR
0 001103bb _XINT3_ISR
0 001103c5 _CFLSINGERR_ISR
0 001103cf _CFLFSM_ISR
0 001103d9 _CRAMSINGERR_ISR
0 001103e3 _CRAMACCVIOL_ISR
0 001103ed _LVF_ISR
0 001103f7 _LUF_ISR
0 00110401 _EMPTY_ISR
0 0011040e _PIE_RESERVED
0 00110418 _rsvd_ISR
0 00110540 _capture_init
0 00110585 _cmd_capture_clear
0 0011058d _cmd_capture
0 001105c7 _cmd_capture_ls
0 001105f2 _cmd_capture_start
0 0011067d _cmd_capture_stop
0 00110686 _DeviceInit
0 00110892 _CsmUnlock
0 00110a3e _control_init
0 00110a4b _cmd_ignite
0 00110a69 _cmd_kill
0 00110a7c _cmd_clear
0 00110aa4 _mcfifo_init
0 00110b48 _mcfifo_put_nonblock
0 00110b6f _mcfifo_get_nonblock
0 00110b9a _mcfifo_get_elems
0 00110bb3 _mcfifo_available
0 00110bd3 _mcfifo_empty
0 00110be8 _mcfifo_put_nonblock_chars
0 00110c0f _mcfifo_get_nonblock_chars
0 00110c3b _epwm5_isr
0 00110c82 _adc1_isr
0 00110cdb _ecap1_isr
0 00110d22 _ecap2_isr
0 00110d69 _ecap3_isr
0 00110d87 _redundantFlow_Timer
0 00110dde _FMSTAT_Fail
0 00110de1 _Shared_Ram_dataRead_c28
0 00110dfb _InitiateFwUpgValidity
0 00110ecc _WriteHexRecord2Flash
0 00110f52 _strtod
0 00110f52 _strtof
0 0011106f _strtol
0 0011115b _tcnsl_init
0 001111c1 _tcnsl_read
0 00111211 _cmd_tcnsl_status
0 0011123b _console_init
0 0011123c _console_flush
0 00111243 _console_busy
0 00111246 _console_write
0 00111262 _console_write_block
0 001112a4 _console_update
0 001112b1 _console_read_nonblock
0 001112b3 _console_read_ready
0 001112b6 _console_read_ack
0 001112b9 _console_check_output
0 001112cc _cmd_test
0 001112e1 _strtoul
0 00111401 _sflash_valid
0 00111427 _sflash_read
0 00111469 ___co_wrap
0 00111479 _co_create
0 001114d4 FD$$DIV
0 0011155f FS$$DIV
0 001115e7 FD$$MPY
0 0011166a _InitCpuTimers
0 001116ab _ConfigCpuTimer
0 00111741 _snprntf
0 00111751 _c_int00
0 001117a7 _cprntf_putchars
0 001117d2 _vfprntf
0 001117e3 _prntf
0 001117f0 _prflush
0 001117f3 _faults_init
0 001117f4 _cmd_why
0 0011182b _atoi
0 0011185c _InitPieCtrl
0 00111880 _EnableInterrupts
0 00111889 FD$$CMP
0 001118b3 L$$DIV
0 001118c2 L$$MOD
0 001118d0 UL$$DIV
0 001118d7 UL$$MOD
0 001118dd C$$EXIT
0 001118dd _abort
0 001118df _exit
0 00111906 _struct_lookup
0 0011192d _InitPieVectTable
0 00111953 _copy_in
0 00111977 FD$$TOFS
0 0011199a I$$DIV
0 001119ab I$$MOD
0 001119bc _co_resume_asm
0 001119db _memcpy
0 001119f9 _strncpy
0 00111a17 FS$$TOFD
0 00111a33 __args_main
0 00111a4c _raw_update
0 00111a60 _raw_init
0 00111a64 LL$$AND
0 00111a6c LL$$OR
0 00111a74 LL$$XOR
0 00111a7c _strncmp
0 00111a94 _MemCopy
0 00111aa7 _strpbrk
0 00111ab4 _memset
0 00111ac0 _isdigit
0 00111acb _isspace
0 00111ad6 U$$DIV
0 00111adb U$$MOD
0 00111ae1 _strcmp
0 00111aeb __register_unlock
0 00111aef __register_lock
0 00111af3 __nop
0 00111af4 FD$$NEG
0 00111afd _strlen
0 00111b05 _strcpy
0 00111b0a _shared_init
0 00111b0f __system_pre_init
0 00111b11 __system_post_cinit
0 00111b12 ___cinit__
0 00111b12 cinit
0 0013fff0 code_redirect
1 00000050 __stack
1 00000650 __STACK_END
1 00000880 _DevEmuRegs
1 00000ae0 _CsmRegs
1 00000b00 _Adc1Result
1 00000b00 _AdcResult
1 00000b40 _Adc2Result
1 00000c00 _CpuTimer0Regs
1 00000c08 _CpuTimer1Regs
1 00000c10 _CpuTimer2Regs
1 00000ce0 _PieCtrlRegs
1 00000d00 _PieVectTable
1 00000e00 _PieVectTableCopy
1 00001000 _DmaRegs
1 00001700 _AnalogSysctrlRegs
1 00004000 _FlashCtrlRegs
1 00004300 _FlashEccRegs
1 00004400 _M3PllRegs
1 00004900 _RAMRegs
1 00004a00 _RAMErrRegs
1 00004e00 _CtoMIpcRegs
1 00005000 _McbspaRegs
1 00005100 _EPwm1Regs
1 00005180 _EPwm2Regs
1 00005200 _EPwm3Regs
1 00005280 _EPwm4Regs
1 00005300 _EPwm5Regs
1 00005380 _EPwm6Regs
1 00005400 _EPwm7Regs
1 00005480 _EPwm8Regs
1 00005500 _EPwm9Regs
1 00005a00 _ECap1Regs
1 00005a20 _ECap2Regs
1 00005a40 _ECap3Regs
1 00005a60 _ECap4Regs
1 00005a80 _ECap5Regs
1 00005aa0 _ECap6Regs
1 00005b00 _EQep1Regs
1 00005b40 _EQep2Regs
1 00005b80 _EQep3Regs
1 00005f80 _GpioCtrlRegs
1 00005f80 _GpioG1CtrlRegs
1 00005fc0 _GpioDataRegs
1 00005fc0 _GpioG1DataRegs
1 00005fe0 _GpioG1TripRegs
1 00005fe0 _GpioTripRegs
1 00006400 _Comp1Regs
1 00006420 _Comp2Regs
1 00006440 _Comp3Regs
1 00006460 _Comp4Regs
1 00006480 _Comp5Regs
1 000064a0 _Comp6Regs
1 00006f80 _GpioG2CtrlRegs
1 00006fc0 _GpioG2DataRegs
1 00007010 _SysCtrlRegs
1 00007040 _SpiaRegs
1 00007050 _SciaRegs
1 00007060 _NmiIntruptRegs
1 00007070 _XIntruptRegs
1 00007100 _Adc1Regs
1 00007100 _AdcRegs
1 00007180 _Adc2Regs
1 00007900 _I2caRegs
1 00009222 _print_fifo
1 00009280 _print_buf
1 00009e80 _motor_EOT
1 00009e81 _gu8BuzzerEn
1 0000a4c0 _capture_def
1 0000a6fa _firmwareupgrde_def
1 0000a700 _dspsock_def
1 0000a81a _dspbuf_idx
1 0000a81c _dspbufs
1 0000a838 ___TI_enable_exit_profile_output
1 0000a83a ___TI_cleanup_ptr
1 0000a83c ___TI_dtors_ptr
1 0000a83e __lock
1 0000a840 _errs
1 0000a880 _web
1 0000a908 _faults_def
1 0000a93e __unlock
1 0000a940 _g_FirstTimeBoot
1 0000a941 _gu8OneTimeExecute
1 0000a942 _gu8IgniteKill
1 0000a944 _u16ReadTestData
1 0000a948 _noSteps
1 0000a94a _u32PulseCount
1 0000a950 _epwm5_info
1 0000a95a _mcfifo_serial0
1 0000a968 _mcfifo_www
1 0000a980 _mcfifo_console
1 0000a9c0 _static_array
1 0000aa00 _control_def
1 0000aab4 _co_current
1 0000aab6 _co_main
1 0000aac0 _tcnsl
1 0000ab50 _retval
1 0000ab51 _u8IgbtLoop
1 0000ab52 _u8IgbtBufFul
1 0000ab53 _onetimeflag
1 0000ab54 _prev_total_pulse_cnt
1 0000ab56 _g_fIgbt_on_us
1 0000ab6a _root_def
1 0000ab7e _errno
1 0000ab81 _u32CurrentActivePartition
1 0000ab84 _Buffer32
1 0000abc0 _c28_r_w_array
1 0000ac00 _comm_def
1 0000ac80 _raw_def
1 0000ad60 _CpuTimer1
1 0000ad68 _CpuTimer2
1 0000ad70 _CpuTimer0
1 0000ad80 _motor_def
1 0000adde _test_def
1 0000adf0 _mcfifo_dspsock
1 0000c000 _c28_r_array
1 0000c040 _Buffer
1 0003f800 _c28_msgram_fifos
1 0003fb60 _shared_def
1 0013fff2 _FlashExeOnly
1 0013fff4 _EcslPwl
1 0013fff8 _CsmPwl
abs 00000600 __STACK_SIZE
abs 00001696 _RamfuncsLoadSize
abs 00008000 _RamfuncsRunStart
abs 00104002 _RamfuncsLoadStart
abs 00105698 _RamfuncsLoadEnd
abs ffffffff .text
abs ffffffff ___TI_pprof_out_hndl
abs ffffffff ___TI_prof_data_size
abs ffffffff ___TI_prof_data_start
abs ffffffff ___binit__
abs ffffffff ___c_args__
abs ffffffff ___etext__
abs ffffffff ___pinit__
abs ffffffff ___text__
abs ffffffff binit
abs ffffffff etext
abs ffffffff pinit

[527 symbols]

EOF map file

-------------------------------------------------------------------------------------------

can you please look out for the above files and please give us the suggestions to fix the issue.

I can point out two large gaps between initialized sections.  You need to make changes to the linker command file to avoid them.  I am unable to help you decide the best way to make those changes.

The first initialized section is flashfuncs at address 0x00009696.  The length is only 0x13 words.  There is a long gap until the next initialized section, which is codestart at 0x00104000.  Should this section be at this address?  It looks very out of place.

codestart, and the next few initialized sections, are all adjacent in memory, ending with .text.  The .text section starts at 0x0010c97e and ends at 0x00111b12.

Then there is the second long gap between initialized sections.  The next initialized section is csm_rsvd at 0x0013ff80.  There are four more initialized sections right after it, all adjacent.  

So there are two large gaps to consider.  One between flashfuncs and codestart, and the next between .text and csm_rsvd.  If you can't decide on the best way to change the linker command file to avoid these gaps, please let me know.  I'll notify the C28x experts who can probably help.

Thanks and regards,

-George

Hello George,

Unfortunately we are still not able to reduce the size of the binary file. We still see a heavily hole-filled binary file which is unusable for firmware upgrade.

Can you please help us with the linker command file settings. 

This is getting critical for the project and we would request your support. 

Regards,

Lakshmi

Lakshmi,

Can you comment on the optimization settings for the project?(right click on the project, then properties and find optimization under the compiler section)  We usually recommend a setting of 2 as a starting point, but we could try and shift this in favor of size(lower number) to see if this reduces the holes.

Another option would be to reduce the size that you are allocating for the flash array down to the size needed according to the map file to limit the ranges the linker can place the code. 

Best,

Matthew

Lakshmi,

I need to make a correction to my last post, the optimization we want to make is for the opt for speed input of the compiler, vs the code optimization itself(which we should leave at 2).

I've posted an image of the window from CCS showing which one to change(the variable controlled by the slider is the one we want to set to 0),

Best,

Matthew