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Interupt Threshold(mi) option for DM6437

I have set interrupt threshold option to1 in build option of my project, when I do this my timing increase 250msec. When I un-check that option my timing is 65msec. I am running my code at O3 optimization any specific reason for this change and 1 more thing...

 

Interrupt threshold = 1

 

This 1 represents no. of cycles or msec means what is the exact unit of this option. I tried to take help from the code composer studio document but it was not so effective...

  • The unit for --interrupt_threshold is CPU cycles.  Please see this wiki article for more information.

    Thanks and regards,

    -George

  • I need to know 1 more thing.

    Through link I understood how to use --mi option but can anybody tell me that is there any input I can give to the compiler which will help him to optimized the code for this option other than --mi option

  • For advice on what compiler options to use on C6000 devices please see this Wiki article.

    Thanks and regards,

    -George

  • George the actual problem is that I have designed a system in which I need to send a message from CAN at every 70 msec and I have set the value for interrupt threshold option for 65msec but at random interval my CAN message gets a peak of 30 to 50msec. So is there any option through which I can disable all interrupts for that loop optimization leaving timer interrupt. Also I have checked for 5msec interupt threshold value but this leads to increase in the timing. I can bear 5msec of delay but not more than that...

  • Saurabh Tiwari said:
    Also I have checked for 5msec interupt threshold value but this leads to increase in the timing. I can bear 5msec of delay but not more than that...

    I seldom deal in such issues, so I want to say this back to make sure I understand it correctly.

    When you set the -mi option to allow interrupts every 5 msec, this impacts your performance.  But because of how often external interrupts occur in your peripherals such as CAN, you have to allow the system to be exposed to possible interrupts at least every 5 msec.  If that accurately describes your situation, then I don't see what else can be done.  

    We already discussed how the -mi option works in terms of CPU cycles.  I presume you have already calculated, for your clock rate, how many CPU cycles corresponds to 5 msec.  I want to make sure you are aware it is not possible to calculate this with extreme precision.  Notice -mi works in terms of CPU cycles.   What does that mean?  It means cycles lost to other system effects such as cache misses and memory latency are ignored.  There is no way the compiler can know about cycles lost to such system effects.  But it does mean that, in some cases, the number of actual cycles which pass by while interrupts are disabled can be more, sometimes much more, than the CPU cycles the compiler accounts for.  This argues for setting the -mi value even a bit lower.  That may, in turn, decrease performance yet again.  But, if you really need the system to be ready for interrupts that often, then I don't see any alternative.

    Thanks and regards,

    -George