Hello,
I'm trying to find out why OST is being set in EPWM10 in F28379D on a controlCARD which is under CPU2 control.
I have followed the manual:
...and tried to add a watchpoint for EPwm10Regs.TZFLG.OST but this fails to halt the CPU. I am using XDS100v2.
Everything seems to be correct:
Please can you advise why the CPU2 fails to halt?
Thank you.