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Cannot load CPU2 debug code in GSRAM on F28377D DSP

Claudio Rossi
Prodigy 30 points
Other Parts Discussed in Thread: C2000WARE

Hi

I'm new to this Texas device and CCS, and I have problem to load code for debug.

I'm tring to run some code on CPU1 and CPU2 using GSRAM area for debug.

CPU0 code is mapped on GS0 and GS1, while CPU2 code is mapped on GS2 and GS3; map

files shown a correct mapping of my code.

Now, when I try to load my code for debug, CPU1 load is ok while I get a load error when CCS load the code section for CPU2 (verify error at address 0xE000).

I noticed that when I'm focused on CPU1 I can read and write each memory location (LS ram , GS ram, etc) in memory browser, while when

I'm focused on CPU2 all memory region are shown as 0 and I cannot write nothing. Moreover the value writed in memory browser on GS RAM from CPU1 are not

visible from CPU2.

I have 2 gel file and each file initialize the memory map in order to access each memory region.

My system is:

Windows10, CCS 8.3.1 and Blackhawk USB 560M

What's wrong in my application? Do I need to do something to enable the second CPU?

Thanks for help

  • 0
    TI__Genius 17849 points

    Hi Claudio,

    Are you using a dual core example from C2000Ware? If not, I would recommend you using the examples provided in C2000Ware. They come with example linker command file configured for both cores. Alternatively, you can use the example linker command in your application and changed the assigned memory ranges.

    Regards,

    Ozino

  • 0
    Prodigy 30 points

    I have replaced the GEL files with the ones from C2000Ware and now the loading is ok.