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CSM Reserved and CSM PW copied to SRAM for SRAM build error

tom prohaszka
Expert 1240 points

I have an interesting issue.   We are building code for RAM, but also have a few "Jumps" in flash for testing.  The linker used had the CSM Reserved and CSM PW located at the proper locations in flash, and they are actually built as part of the image for FLASH.  For some odd reason, the CSM sections are being copied OVER L0 RAM for the F28035!  If the sections are disabled, they are not copied by the JTAG. 

Here is the linder sections:

MEMORY

{

...    CSM_RSVD     : origin = 0x3F7F80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */

    CSM_PWL_PROG : origin = 0x3F7FF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA */

}

PAGE 0 :

SECTIONS

{...

  csmpasswds       : > CSM_PWL_PROG, PAGE = 0

   csm_rsvd         : > CSM_RSVD,     PAGE = 0


Is this a JTAG loader issue?   Everything in the map file looks correct.

  • 0
    TI__Guru* 92130 points

    Tom,

    Is CSM_RSVD and CSM_PWL_PROG defined on page 0?  (I see a Page 0 in your cut/paste but it is after these definitions). 

    You can try the -w linker option to see if the linker believes the sections they are not defined.  It will warn something like "allocating csm_rsvd without section".

     

    tom prohaszka said:

    MEMORY

    {

    ...    CSM_RSVD     : origin = 0x3F7F80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */

        CSM_PWL_PROG : origin = 0x3F7FF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA */

    }

    PAGE 0 :

     

     

    SECTIONS

    {...

     

     

      csmpasswds       : > CSM_PWL_PROG, PAGE = 0

       csm_rsvd         : > CSM_RSVD,     PAGE = 0

     

  • 0 in reply to Lori Heustess
    Expert 1240 points

    Hi Lori,  the sections are in PAGE 0.   I do have the -w on and do not receive any linker warning.  What would cause the JTAG to load a section defined in FLASH in a RAM segment.   The odd thing is that the L0 RAM is mirrored just above the flash memory where the CSM information is being written.   I did confirm that the flash is being written with the proper data.  Now, I just need to understand WHY the JTAG is overwritting RAM.


    Tom

  • 0 in reply to tom prohaszka
    Expert 1240 points

    I ran one more test.  I moved the order of the sections for the CSM passwords BEFORE the .text definition, and the JTAG is not over writting the code.  So, is there something wrong with the linker not resolving the sections I defined BEFOE the .text section?

     

    Tom

  • 0 in reply to tom prohaszka
    TI__Guru* 92130 points

    tom prohaszka said:

    I ran one more test.  I moved the order of the sections for the CSM passwords BEFORE the .text definition, and the JTAG is not over writting the code.  So, is there something wrong with the linker not resolving the sections I defined BEFOE the .text section?

     

    Tom

    Tom,

    There shouldn't be an issue of the order.  If you can please attach the generated .map file.  It may offer some clues.   Which version of the compiler are you using?

    Thank you

    Lori

  • 0 in reply to Lori Heustess
    Expert 1240 points

    Fullscreen 8507.RAM_LINKER.txt Download 
    /*==================================================================================*/
/*	User specific Linker command file for running from RAM							*/
/*==================================================================================*/
/*	FILE:			F28035_RAM_2xPM_Sensorless.CMD                                  */
/*                                                                                  */
/*	Description:	Linker command file for User custom sections targetted to run   */
/*					from RAM.  			                                            */
/*                                                                                  */
/*  Target:  		TMS320F28035 device                                             */
/*                                                                                  */
/*	Version: 		1.00                                							*/
/*                                                                                  */
/*----------------------------------------------------------------------------------*/
/*  Copyright Texas Instruments � 2009                                			    */	
/*----------------------------------------------------------------------------------*/
/*  Revision History:                                                               */
/*----------------------------------------------------------------------------------*/
/*  Date	  | Description                                                         */
/*----------------------------------------------------------------------------------*/
/*  10/24/08  | Release 1.0  		New release.                                    */
/*----------------------------------------------------------------------------------*/

/* Define the memory block start/length for the DSP2803x
   PAGE 0 will be used to organize program sections
   PAGE 1 will be used to organize data sections

   Notes:
         Memory blocks on F28035 are uniform (ie same
         physical memory) in both PAGE 0 and PAGE 1.
         That is the same memory region should not be
         defined for both PAGE 0 and PAGE 1.
         Doing so will result in corruption of program
         and/or data.

         L0 block is mirrored - that is it
         can be accessed in high memory or low memory.
         For simplicity only one instance is used in this
         linker file.

         Contiguous SARAM memory blocks can be combined
         if required to create a larger memory block.
*/

MEMORY
{
PAGE 0 :
/* Note that the memory allocation below does not create sections as necessary for
   the CLA on the F2803x. 
*/
   
	BEGIN		   : origin = 0x000000,	length = 0x000002
	BOOT_RSVD	   : origin = 0x000002,	length = 0x00004E             

	progRAM		   : origin = 0x008000,	length = 0x001800

	BOOT_BEGIN 	   : origin = 0x3F7FF6, length = 0x000002     /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
   	CSM_RSVD    	: origin = 0x3F7F80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
   	CSM_PWL_PROG	: origin = 0x3F7FF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA */

	IQTABLES       : origin = 0x3FE000, length = 0x000B50    /* IQ Math Tables in Boot ROM */
	IQTABLES2      : origin = 0x3FEB50, length = 0x00008C    /* IQ Math Tables in Boot ROM */
	IQTABLES3      : origin = 0x3FEBDC, length = 0x0000AA	 /* IQ Math Tables in Boot ROM */

	RESET          : origin = 0x3FFFC0, length = 0x000002
	BOOTROM        : origin = 0x3FF27C, length = 0x000D44               

PAGE 1 : 
	BOOTROM_RSVD   : origin = 0x000000, length = 0x000050     /* Part of M0, BOOT rom will use this for stack */
	RAMM0		   : origin = 0x000050,	length = 0x0003B0
   	RAMM1       : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
	dataRAM	    : origin = 0x009000, length = 0x001000     /* data RAM (L3) */

	CLA_CPU_MSGRAM : origin = 0x001480, length = 0x000080
	CPU_CLA_MSGRAM : origin = 0x001500, length = 0x000080
}
 
 
SECTIONS
{
   /* Allocate program areas: */

   bootcodestart 	: > BOOT_BEGIN,  PAGE = 0
/*   codestart        : > BEGIN,      PAGE = 0	*/
   
    /*Define csmpasswds and csm_rsvd BEFORE .text section or jtag overlays code during debug */
    csmpasswds       : > CSM_PWL_PROG, PAGE = 0 
    csm_rsvd         : > CSM_RSVD,     PAGE = 0   
   
   .cinit           : > progRAM,    	PAGE = 0
   .pinit           : > progRAM,		PAGE = 0
   .text            : > progRAM,    PAGE = 0
   ramfuncs_flashinit: > progRAM,	PAGE = 0 
   ramfuncs       	: > progRAM,	PAGE = 0 

 

   .reset           : > RESET,      PAGE = 0, TYPE = DSECT
   
   /* Allocate uninitalized data sections: */
   .stack            : > RAMM0,      PAGE = 1
   .ebss             : > dataRAM,    PAGE = 1
   .esysmem          : > dataRAM,    PAGE = 1

   /* Initalized sections */
   .econst          : > progRAM,    PAGE = 0      
   .switch          : > progRAM,    PAGE = 0

         

   IQmath           : > progRAM,    PAGE = 0, TYPE = NOLOAD
   IQmathTables     : > IQTABLES, 	PAGE = 0, TYPE = NOLOAD

   Cla1ToCpuMsgRAM  : > CLA_CPU_MSGRAM, PAGE = 1, TYPE = NOLOAD
   CpuToCla1MsgRAM  : > CPU_CLA_MSGRAM, PAGE = 1, TYPE = NOLOAD

 /* Uncomment the section below if calling the IQNexp() or IQexp()
      functions from the IQMath.lib library in order to utilize the
      relevant IQ Math table in Boot ROM (This saves space and Boot ROM
      is 1 wait-state). If this section is not uncommented, IQmathTables2
      will be loaded into other memory (SARAM, Flash, etc.) and will take
      up space, but 0 wait-state is possible.
   */
   /*
   IQmathTables2    : > IQTABLES2, PAGE = 0, TYPE = NOLOAD
   {

              IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)

   }
   */
   /* Uncomment the section below if calling the IQNasin() or IQasin()
      functions from the IQMath.lib library in order to utilize the
      relevant IQ Math table in Boot ROM (This saves space and Boot ROM
      is 1 wait-state). If this section is not uncommented, IQmathTables2
      will be loaded into other memory (SARAM, Flash, etc.) and will take
      up space, but 0 wait-state is possible.
   */
   /*
   IQmathTables3    : > IQTABLES3, PAGE = 0, TYPE = NOLOAD
   {

              IQmath.lib<IQNasinTable.obj> (IQmathTablesRam)

   }
   */

}


    
SECTIONS
{
	DLOG: > dataRAM,PAGE=1, TYPE = NOLOAD
}
    Here is the ram linker.

  • 0 in reply to Lori Heustess
    TI__Guru* 92130 points

    Tom,

    Also please make sure I understand the issue correctly.   If you have already programmed the flash and power the board, when you connect CCS you see at some point L0 get filled with 0's?    Is there a particular step when the fill is done?

    Thank you

    Lori

  • 0 in reply to tom prohaszka
    TI__Guru* 92130 points

    tom prohaszka said:

    Fullscreen 8507.RAM_LINKER.txt Download 
    /*==================================================================================*/
/*	User specific Linker command file for running from RAM							*/
/*==================================================================================*/
/*	FILE:			F28035_RAM_2xPM_Sensorless.CMD                                  */
/*                                                                                  */
/*	Description:	Linker command file for User custom sections targetted to run   */
/*					from RAM.  			                                            */
/*                                                                                  */
/*  Target:  		TMS320F28035 device                                             */
/*                                                                                  */
/*	Version: 		1.00                                							*/
/*                                                                                  */
/*----------------------------------------------------------------------------------*/
/*  Copyright Texas Instruments � 2009                                			    */	
/*----------------------------------------------------------------------------------*/
/*  Revision History:                                                               */
/*----------------------------------------------------------------------------------*/
/*  Date	  | Description                                                         */
/*----------------------------------------------------------------------------------*/
/*  10/24/08  | Release 1.0  		New release.                                    */
/*----------------------------------------------------------------------------------*/

/* Define the memory block start/length for the DSP2803x
   PAGE 0 will be used to organize program sections
   PAGE 1 will be used to organize data sections

   Notes:
         Memory blocks on F28035 are uniform (ie same
         physical memory) in both PAGE 0 and PAGE 1.
         That is the same memory region should not be
         defined for both PAGE 0 and PAGE 1.
         Doing so will result in corruption of program
         and/or data.

         L0 block is mirrored - that is it
         can be accessed in high memory or low memory.
         For simplicity only one instance is used in this
         linker file.

         Contiguous SARAM memory blocks can be combined
         if required to create a larger memory block.
*/

MEMORY
{
PAGE 0 :
/* Note that the memory allocation below does not create sections as necessary for
   the CLA on the F2803x. 
*/
   
	BEGIN		   : origin = 0x000000,	length = 0x000002
	BOOT_RSVD	   : origin = 0x000002,	length = 0x00004E             

	progRAM		   : origin = 0x008000,	length = 0x001800

	BOOT_BEGIN 	   : origin = 0x3F7FF6, length = 0x000002     /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
   	CSM_RSVD    	: origin = 0x3F7F80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
   	CSM_PWL_PROG	: origin = 0x3F7FF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA */

	IQTABLES       : origin = 0x3FE000, length = 0x000B50    /* IQ Math Tables in Boot ROM */
	IQTABLES2      : origin = 0x3FEB50, length = 0x00008C    /* IQ Math Tables in Boot ROM */
	IQTABLES3      : origin = 0x3FEBDC, length = 0x0000AA	 /* IQ Math Tables in Boot ROM */

	RESET          : origin = 0x3FFFC0, length = 0x000002
	BOOTROM        : origin = 0x3FF27C, length = 0x000D44               

PAGE 1 : 
	BOOTROM_RSVD   : origin = 0x000000, length = 0x000050     /* Part of M0, BOOT rom will use this for stack */
	RAMM0		   : origin = 0x000050,	length = 0x0003B0
   	RAMM1       : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
	dataRAM	    : origin = 0x009000, length = 0x001000     /* data RAM (L3) */

	CLA_CPU_MSGRAM : origin = 0x001480, length = 0x000080
	CPU_CLA_MSGRAM : origin = 0x001500, length = 0x000080
}
 
 
SECTIONS
{
   /* Allocate program areas: */

   bootcodestart 	: > BOOT_BEGIN,  PAGE = 0
/*   codestart        : > BEGIN,      PAGE = 0	*/
   
    /*Define csmpasswds and csm_rsvd BEFORE .text section or jtag overlays code during debug */
    csmpasswds       : > CSM_PWL_PROG, PAGE = 0 
    csm_rsvd         : > CSM_RSVD,     PAGE = 0   
   
   .cinit           : > progRAM,    	PAGE = 0
   .pinit           : > progRAM,		PAGE = 0
   .text            : > progRAM,    PAGE = 0
   ramfuncs_flashinit: > progRAM,	PAGE = 0 
   ramfuncs       	: > progRAM,	PAGE = 0 

 

   .reset           : > RESET,      PAGE = 0, TYPE = DSECT
   
   /* Allocate uninitalized data sections: */
   .stack            : > RAMM0,      PAGE = 1
   .ebss             : > dataRAM,    PAGE = 1
   .esysmem          : > dataRAM,    PAGE = 1

   /* Initalized sections */
   .econst          : > progRAM,    PAGE = 0      
   .switch          : > progRAM,    PAGE = 0

         

   IQmath           : > progRAM,    PAGE = 0, TYPE = NOLOAD
   IQmathTables     : > IQTABLES, 	PAGE = 0, TYPE = NOLOAD

   Cla1ToCpuMsgRAM  : > CLA_CPU_MSGRAM, PAGE = 1, TYPE = NOLOAD
   CpuToCla1MsgRAM  : > CPU_CLA_MSGRAM, PAGE = 1, TYPE = NOLOAD

 /* Uncomment the section below if calling the IQNexp() or IQexp()
      functions from the IQMath.lib library in order to utilize the
      relevant IQ Math table in Boot ROM (This saves space and Boot ROM
      is 1 wait-state). If this section is not uncommented, IQmathTables2
      will be loaded into other memory (SARAM, Flash, etc.) and will take
      up space, but 0 wait-state is possible.
   */
   /*
   IQmathTables2    : > IQTABLES2, PAGE = 0, TYPE = NOLOAD
   {

              IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)

   }
   */
   /* Uncomment the section below if calling the IQNasin() or IQasin()
      functions from the IQMath.lib library in order to utilize the
      relevant IQ Math table in Boot ROM (This saves space and Boot ROM
      is 1 wait-state). If this section is not uncommented, IQmathTables2
      will be loaded into other memory (SARAM, Flash, etc.) and will take
      up space, but 0 wait-state is possible.
   */
   /*
   IQmathTables3    : > IQTABLES3, PAGE = 0, TYPE = NOLOAD
   {

              IQmath.lib<IQNasinTable.obj> (IQmathTablesRam)

   }
   */

}


    
SECTIONS
{
	DLOG: > dataRAM,PAGE=1, TYPE = NOLOAD
}
    Here is the ram linker.

    Thanks, can you also attach the generated .map file.  It is likely in your debug directory.  This file shows where everything ended up after the link process.

    Regards,

    Lori

     

  • 0 in reply to Lori Heustess
    Expert 1240 points

    This is occuring during RAM Debug.  It appears the code is loaded first at 0x8000, then it is overlayed with the csm reserved and csmpassword.   By changing the order, I think all I've done was ensure code is overlayed last so it's not corrupted.   This code will always run from RAM, it's part of a bootloaer we are writting, so it will never run from Flash.

     

  • 0 in reply to tom prohaszka
    Expert 1240 points

    Fullscreen 6114.ProgramMapFile.txt Download 
    ******************************************************************************
             TMS320C2000 Linker PC v5.2.10                     
******************************************************************************
>> Linked Mon May 23 09:09:33 2011

OUTPUT FILE NAME:   <SLWFLASH.out>
ENTRY POINT SYMBOL: "_c_int00"  address: 00008357


MEMORY CONFIGURATION

         name            origin    length      used     unused   attr    fill
----------------------  --------  ---------  --------  --------  ----  --------
PAGE 0:
  BEGIN                 00000000   00000002  00000000  00000002  RWIX
  BOOT_RSVD             00000002   0000004e  00000000  0000004e  RWIX
  progRAM               00008000   00001800  00000a98  00000d68  RWIX
  CSM_RSVD              003f7f80   00000076  00000076  00000000  RWIX
  BOOT_BEGIN            003f7ff6   00000002  00000002  00000000  RWIX
  CSM_PWL_PROG          003f7ff8   00000008  00000008  00000000  RWIX
  IQTABLES              003fe000   00000b50  00000000  00000b50  RWIX
  IQTABLES2             003feb50   0000008c  00000000  0000008c  RWIX
  IQTABLES3             003febdc   000000aa  00000000  000000aa  RWIX
  BOOTROM               003ff27c   00000d44  00000000  00000d44  RWIX
  RESET                 003fffc0   00000002  00000000  00000002  RWIX

PAGE 1:
  BOOTROM_RSVD          00000000   00000050  00000000  00000050  RWIX
  RAMM0                 00000050   000003b0  00000380  00000030  RWIX
  RAMM1                 00000400   00000400  00000000  00000400  RWIX
  DEV_EMU               00000880   00000105  00000004  00000101  RWIX
  SYS_PWR_CTL           00000985   00000003  00000003  00000000  RWIX
  FLASH_REGS            00000a80   00000060  00000008  00000058  RWIX
  CSM                   00000ae0   00000010  00000010  00000000  RWIX
  ADC_RESULT            00000b00   00000020  00000020  00000000  RWIX
  CPU_TIMER0            00000c00   00000008  00000008  00000000  RWIX
  CPU_TIMER1            00000c08   00000008  00000008  00000000  RWIX
  CPU_TIMER2            00000c10   00000008  00000008  00000000  RWIX
  PIE_CTRL              00000ce0   00000020  0000001a  00000006  RWIX
  PIE_VECT              00000d00   00000100  00000100  00000000  RWIX
  CLA1                  00001400   00000080  00000040  00000040  RWIX
  CLA_CPU_MSGRAM        00001480   00000080  00000000  00000080  RWIX
  CPU_CLA_MSGRAM        00001500   00000080  00000000  00000080  RWIX
  ECANA                 00006000   00000040  00000034  0000000c  RWIX
  ECANA_LAM             00006040   00000040  00000040  00000000  RWIX
  ECANA_MOTS            00006080   00000040  00000040  00000000  RWIX
  ECANA_MOTO            000060c0   00000040  00000040  00000000  RWIX
  ECANA_MBOX            00006100   00000100  00000100  00000000  RWIX
  COMP1                 00006400   00000020  00000011  0000000f  RWIX
  COMP2                 00006420   00000020  00000011  0000000f  RWIX
  COMP3                 00006440   00000020  00000011  0000000f  RWIX
  EPWM1                 00006800   00000040  00000040  00000000  RWIX
  EPWM2                 00006840   00000040  00000040  00000000  RWIX
  EPWM3                 00006880   00000040  00000040  00000000  RWIX
  EPWM4                 000068c0   00000040  00000040  00000000  RWIX
  EPWM5                 00006900   00000040  00000040  00000000  RWIX
  EPWM6                 00006940   00000040  00000040  00000000  RWIX
  EPWM7                 00006980   00000040  00000040  00000000  RWIX
  ECAP1                 00006a00   00000020  00000020  00000000  RWIX
  EQEP1                 00006b00   00000040  00000040  00000000  RWIX
  LINA                  00006c00   00000080  0000004a  00000036  RWIX
  GPIOCTRL              00006f80   00000040  00000040  00000000  RWIX
  GPIODAT               00006fc0   00000020  00000020  00000000  RWIX
  GPIOINT               00006fe0   00000020  0000000c  00000014  RWIX
  SYSTEM                00007010   00000020  00000020  00000000  RWIX
  SPIA                  00007040   00000010  00000010  00000000  RWIX
  SCIA                  00007050   00000010  00000010  00000000  RWIX
  NMIINTRUPT            00007060   00000010  00000010  00000000  RWIX
  XINTRUPT              00007070   00000010  00000010  00000000  RWIX
  ADC                   00007100   00000080  00000050  00000030  RWIX
  SPIB                  00007740   00000010  00000010  00000000  RWIX
  I2CA                  00007900   00000040  00000022  0000001e  RWIX
  dataRAM               00009000   00001000  000000da  00000f26  RWIX
  PARTID                003d7e80   00000001  00000001  00000000  RWIX
  CSM_PWL               003f7ff8   00000008  00000008  00000000  RWIX


SECTION ALLOCATION MAP

 output                                  attributes/
section   page    origin      length       input sections
--------  ----  ----------  ----------   ----------------
.pinit     0    00008000    00000000     UNINITIALIZED

.text      0    00008000    000008f5     
                  00008000    0000010d     DSP2803x_Gpio.obj (.text:_InitGpio)
                  0000810d    00000098     Message.obj (.text:_ProcessLin)
                  000081a5    00000066     Message.obj (.text:_ProcessReceivedMessage)
                  0000820b    00000063     Message.obj (.text:_ServiceSid31)
                  0000826e    0000005a     rts2800_ml.lib : fs_mpy.obj (.text)
                  000082c8    0000004c     Diagnostic.obj (.text:_fDiagState_DIAGST_PROLOGUE)
                  00008314    00000043     DSP2803x_EPwm.obj (.text:_InitEPwm)
                  00008357    00000041     boot28.obj (.text)
                  00008398    0000003f     DSP2803x_CpuTimers.obj (.text:_InitCpuTimers)
                  000083d7    0000003c     DSP2803x_SysCtrl.obj (.text:_InitPll)
                  00008413    0000003a     DSP2803x_SysCtrl.obj (.text:_InitPeripheralClocks)
                  0000844d    00000035     Message.obj (.text:_ServiceSid36)
                  00008482    00000035     Main.obj (.text:_main)
                  000084b7    0000002e     Diagnostic.obj (.text:_GetPriorityDutyByIndex)
                  000084e5    00000029     Message.obj (.text:_InitLinReg)
                  0000850e    00000029     rts2800_ml.lib : fs_tol.obj (.text)
                  00008537    00000028     Main.obj (.text:_Tasks)
                  0000855f    00000025     DSP2803x_CpuTimers.obj (.text:_ConfigCpuTimer)
                  00008584    00000023     DSP2803x_SysCtrl.obj (.text:_InitSysCtrl)
                  000085a7    00000020     Diagnostic.obj (.text:_fDiagState_DIAGST_EPILOGUE)
                  000085c7    00000020     Diagnostic.obj (.text:_fDiagState_DIAGST_FAULT)
                  000085e7    00000020     Diagnostic.obj (.text:_fDiagState_DIAGST_IDLE)
                  00008607    0000001f     DSP2803x_PieCtrl.obj (.text:_InitPieCtrl)
                  00008626    0000001a     power_mgr.obj (.text:_Monitor_Wakeup)
                  00008640    00000019     rts2800_ml.lib : exit.obj (.text)
                  00008659    00000016     Flash.obj (.text:_InitFlashloader)
                  0000866f    00000016     DSP2803x_PieVect.obj (.text:_InitPieVectTable)
                  00008685    00000015     power_mgr.obj (.text:_fPwrState_PWRST_SHUTDOWN)
                  0000869a    00000011     Message.obj (.text:_InitMessaging)
                  000086ab    00000010     DSP2803x_SysCtrl.obj (.text:_IntOsc1Sel)
                  000086bb    00000010     power_mgr.obj (.text:_fPwrState_PWRST_OFF)
                  000086cb    0000000f     Diagnostic.obj (.text:_CalcDiagPeriod)
                  000086da    0000000e     Main.obj (.text:_cpu_timer1_isr)
                  000086e8    0000000c     Message.obj (.text:_SetNegativeResponse)
                  000086f4    0000000c     Message.obj (.text:_SetPositiveResponse)
                  00008700    0000000c     power_mgr.obj (.text:_fPwrState_PWRST_ON)
                  0000870c    0000000b     Message.obj (.text:_ServiceSid34)
                  00008717    0000000a     Diagnostic.obj (.text:_CalcRpmFrequency)
                  00008721    0000000a     DSP2803x_PieCtrl.obj (.text:_EnableInterrupts)
                  0000872b    0000000a     DSP2803x_SysCtrl.obj (.text:_WaitForPllLock)
                  00008735    00000009     rts2800_ml.lib : _lock.obj (.text)
                  0000873e    00000008     BootA.obj (.text)
                  00008746    00000008     DSP2803x_SysCtrl.obj (.text:_DisableDog)
                  0000874e    00000007     DSP2803x_DisInt.obj (.text)
                  00008755    00000007     Diagnostic.obj (.text:_DiagMsgMonitor)
                  0000875c    00000007     power_mgr.obj (.text:_PowerMgr)
                  00008763    00000007     Message.obj (.text:_ServiceSid37)
                  0000876a    00000007     rts2800_ml.lib : memset.obj (.text)
                  00008771    00000006     Message.obj (.text:_CompleteStartFlashLoader)
                  00008777    00000005     DSP2803x_DefaultIsr.obj (.text:_ADCINT1_ISR)
                  0000877c    00000005     DSP2803x_DefaultIsr.obj (.text:_ADCINT2_ISR)
                  00008781    00000005     DSP2803x_DefaultIsr.obj (.text:_ADCINT3_ISR)
                  00008786    00000005     DSP2803x_DefaultIsr.obj (.text:_ADCINT4_ISR)
                  0000878b    00000005     DSP2803x_DefaultIsr.obj (.text:_ADCINT5_ISR)
                  00008790    00000005     DSP2803x_DefaultIsr.obj (.text:_ADCINT6_ISR)
                  00008795    00000005     DSP2803x_DefaultIsr.obj (.text:_ADCINT7_ISR)
                  0000879a    00000005     DSP2803x_DefaultIsr.obj (.text:_ADCINT8_ISR)
                  0000879f    00000005     DSP2803x_DefaultIsr.obj (.text:_ADCINT9_ISR)
                  000087a4    00000005     DSP2803x_DefaultIsr.obj (.text:_CLA1_INT1_ISR)
                  000087a9    00000005     DSP2803x_DefaultIsr.obj (.text:_CLA1_INT2_ISR)
                  000087ae    00000005     DSP2803x_DefaultIsr.obj (.text:_CLA1_INT3_ISR)
                  000087b3    00000005     DSP2803x_DefaultIsr.obj (.text:_CLA1_INT4_ISR)
                  000087b8    00000005     DSP2803x_DefaultIsr.obj (.text:_CLA1_INT5_ISR)
                  000087bd    00000005     DSP2803x_DefaultIsr.obj (.text:_CLA1_INT6_ISR)
                  000087c2    00000005     DSP2803x_DefaultIsr.obj (.text:_CLA1_INT7_ISR)
                  000087c7    00000005     DSP2803x_DefaultIsr.obj (.text:_CLA1_INT8_ISR)
                  000087cc    00000005     DSP2803x_DefaultIsr.obj (.text:_DATALOG_ISR)
                  000087d1    00000005     DSP2803x_DefaultIsr.obj (.text:_ECAN0INTA_ISR)
                  000087d6    00000005     DSP2803x_DefaultIsr.obj (.text:_ECAN1INTA_ISR)
                  000087db    00000005     DSP2803x_DefaultIsr.obj (.text:_ECAP1_INT_ISR)
                  000087e0    00000005     DSP2803x_DefaultIsr.obj (.text:_EMUINT_ISR)
                  000087e5    00000005     DSP2803x_DefaultIsr.obj (.text:_EPWM1_INT_ISR)
                  000087ea    00000005     DSP2803x_DefaultIsr.obj (.text:_EPWM1_TZINT_ISR)
                  000087ef    00000005     DSP2803x_DefaultIsr.obj (.text:_EPWM2_INT_ISR)
                  000087f4    00000005     DSP2803x_DefaultIsr.obj (.text:_EPWM2_TZINT_ISR)
                  000087f9    00000005     DSP2803x_DefaultIsr.obj (.text:_EPWM3_INT_ISR)
                  000087fe    00000005     DSP2803x_DefaultIsr.obj (.text:_EPWM3_TZINT_ISR)
                  00008803    00000005     DSP2803x_DefaultIsr.obj (.text:_EPWM4_INT_ISR)
                  00008808    00000005     DSP2803x_DefaultIsr.obj (.text:_EPWM4_TZINT_ISR)
                  0000880d    00000005     DSP2803x_DefaultIsr.obj (.text:_EPWM5_INT_ISR)
                  00008812    00000005     DSP2803x_DefaultIsr.obj (.text:_EPWM5_TZINT_ISR)
                  00008817    00000005     DSP2803x_DefaultIsr.obj (.text:_EPWM6_INT_ISR)
                  0000881c    00000005     DSP2803x_DefaultIsr.obj (.text:_EPWM6_TZINT_ISR)
                  00008821    00000005     DSP2803x_DefaultIsr.obj (.text:_EPWM7_INT_ISR)
                  00008826    00000005     DSP2803x_DefaultIsr.obj (.text:_EPWM7_TZINT_ISR)
                  0000882b    00000005     DSP2803x_DefaultIsr.obj (.text:_EQEP1_INT_ISR)
                  00008830    00000005     DSP2803x_DefaultIsr.obj (.text:_I2CINT1A_ISR)
                  00008835    00000005     DSP2803x_DefaultIsr.obj (.text:_I2CINT2A_ISR)
                  0000883a    00000005     DSP2803x_DefaultIsr.obj (.text:_ILLEGAL_ISR)
                  0000883f    00000005     DSP2803x_DefaultIsr.obj (.text:_INT13_ISR)
                  00008844    00000005     DSP2803x_DefaultIsr.obj (.text:_INT14_ISR)
                  00008849    00000005     InitHardware.obj (.text:_InitSysClocks)
                  0000884e    00000005     DSP2803x_DefaultIsr.obj (.text:_LIN0INTA_ISR)
                  00008853    00000005     DSP2803x_DefaultIsr.obj (.text:_LIN1INTA_ISR)
                  00008858    00000005     DSP2803x_DefaultIsr.obj (.text:_LUF_ISR)
                  0000885d    00000005     DSP2803x_DefaultIsr.obj (.text:_LVF_ISR)
                  00008862    00000005     DSP2803x_DefaultIsr.obj (.text:_NMI_ISR)
                  00008867    00000005     DSP2803x_DefaultIsr.obj (.text:_PIE_RESERVED)
                  0000886c    00000005     DSP2803x_DefaultIsr.obj (.text:_RTOSINT_ISR)
                  00008871    00000005     DSP2803x_DefaultIsr.obj (.text:_SCIRXINTA_ISR)
                  00008876    00000005     DSP2803x_DefaultIsr.obj (.text:_SCITXINTA_ISR)
                  0000887b    00000005     DSP2803x_DefaultIsr.obj (.text:_SPIRXINTA_ISR)
                  00008880    00000005     DSP2803x_DefaultIsr.obj (.text:_SPIRXINTB_ISR)
                  00008885    00000005     DSP2803x_DefaultIsr.obj (.text:_SPITXINTA_ISR)
                  0000888a    00000005     DSP2803x_DefaultIsr.obj (.text:_SPITXINTB_ISR)
                  0000888f    00000005     DSP2803x_DefaultIsr.obj (.text:_TINT0_ISR)
                  00008894    00000005     DSP2803x_DefaultIsr.obj (.text:_USER10_ISR)
                  00008899    00000005     DSP2803x_DefaultIsr.obj (.text:_USER11_ISR)
                  0000889e    00000005     DSP2803x_DefaultIsr.obj (.text:_USER12_ISR)
                  000088a3    00000005     DSP2803x_DefaultIsr.obj (.text:_USER1_ISR)
                  000088a8    00000005     DSP2803x_DefaultIsr.obj (.text:_USER2_ISR)
                  000088ad    00000005     DSP2803x_DefaultIsr.obj (.text:_USER3_ISR)
                  000088b2    00000005     DSP2803x_DefaultIsr.obj (.text:_USER4_ISR)
                  000088b7    00000005     DSP2803x_DefaultIsr.obj (.text:_USER5_ISR)
                  000088bc    00000005     DSP2803x_DefaultIsr.obj (.text:_USER6_ISR)
                  000088c1    00000005     DSP2803x_DefaultIsr.obj (.text:_USER7_ISR)
                  000088c6    00000005     DSP2803x_DefaultIsr.obj (.text:_USER8_ISR)
                  000088cb    00000005     DSP2803x_DefaultIsr.obj (.text:_USER9_ISR)
                  000088d0    00000005     DSP2803x_DefaultIsr.obj (.text:_WAKEINT_ISR)
                  000088d5    00000005     DSP2803x_DefaultIsr.obj (.text:_XINT1_ISR)
                  000088da    00000005     DSP2803x_DefaultIsr.obj (.text:_XINT2_ISR)
                  000088df    00000005     DSP2803x_DefaultIsr.obj (.text:_XINT3_ISR)
                  000088e4    00000005     DSP2803x_DefaultIsr.obj (.text:_rsvd_ISR)
                  000088e9    00000004     Start.obj (.text)
                  000088ed    00000004     Diagnostic.obj (.text:_SetDiagPeriod)
                  000088f1    00000003     DSP2803x_DBGIER.obj (.text)
                  000088f4    00000001     Flash.obj (.text:_FlashCallbackFunction)

.econst    0    000088f6    00000111     
                  000088f6    00000100     DSP2803x_PieVect.obj (.econst)
                  000089f6    0000000b     Diagnostic.obj (.econst:_DiagMsgPriorityDuty)
                  00008a01    00000006     Diagnostic.obj (.econst)

.cinit     0    00008a07    00000084     
                  00008a07    0000002f     Diagnostic.obj (.cinit)
                  00008a36    00000025     Main.obj (.cinit)
                  00008a5b    00000015     power_mgr.obj (.cinit)
                  00008a70    0000000a     rts2800_ml.lib : _lock.obj (.cinit)
                  00008a7a    0000000a                    : exit.obj (.cinit)
                  00008a84    00000005     Message.obj (.cinit)
                  00008a89    00000002     --HOLE-- [fill = 0]

ramfuncs   0    00008a8b    0000000e     
                  00008a8b    0000000e     DSP2803x_usDelay.obj (ramfuncs)

csm_rsvd   0    003f7f80    00000076     
                  003f7f80    00000076     BootA.obj (csm_rsvd)

bootcodestart 
*          0    003f7ff6    00000002     
                  003f7ff6    00000002     BootA.obj (bootcodestart)

csmpasswds 
*          0    003f7ff8    00000008     
                  003f7ff8    00000008     BootA.obj (csmpasswds)

.reset     0    003fffc0    00000002     DSECT
                  003fffc0    00000002     boot28.obj (.reset)

.stack     1    00000050    00000380     UNINITIALIZED
                  00000050    00000380     --HOLE--

DevEmuRegsFile 
*          1    00000880    00000004     UNINITIALIZED
                  00000880    00000004     DSP2803x_GlobalVariableDefs.obj (DevEmuRegsFile)

SysPwrCtrlRegsFile 
*          1    00000985    00000003     UNINITIALIZED
                  00000985    00000003     DSP2803x_GlobalVariableDefs.obj (SysPwrCtrlRegsFile)

FlashRegsFile 
*          1    00000a80    00000008     UNINITIALIZED
                  00000a80    00000008     DSP2803x_GlobalVariableDefs.obj (FlashRegsFile)

CsmRegsFile 
*          1    00000ae0    00000010     UNINITIALIZED
                  00000ae0    00000010     DSP2803x_GlobalVariableDefs.obj (CsmRegsFile)

AdcResultFile 
*          1    00000b00    00000020     UNINITIALIZED
                  00000b00    00000020     DSP2803x_GlobalVariableDefs.obj (AdcResultFile)

CpuTimer0RegsFile 
*          1    00000c00    00000008     UNINITIALIZED
                  00000c00    00000008     DSP2803x_GlobalVariableDefs.obj (CpuTimer0RegsFile)

CpuTimer1RegsFile 
*          1    00000c08    00000008     UNINITIALIZED
                  00000c08    00000008     DSP2803x_GlobalVariableDefs.obj (CpuTimer1RegsFile)

CpuTimer2RegsFile 
*          1    00000c10    00000008     UNINITIALIZED
                  00000c10    00000008     DSP2803x_GlobalVariableDefs.obj (CpuTimer2RegsFile)

PieCtrlRegsFile 
*          1    00000ce0    0000001a     UNINITIALIZED
                  00000ce0    0000001a     DSP2803x_GlobalVariableDefs.obj (PieCtrlRegsFile)

PieVectTableFile 
*          1    00000d00    00000100     UNINITIALIZED
                  00000d00    00000100     DSP2803x_GlobalVariableDefs.obj (PieVectTableFile)

EmuKeyVar 
*          1    00000d00    00000001     UNINITIALIZED
                  00000d00    00000001     DSP2803x_GlobalVariableDefs.obj (EmuKeyVar)

EmuBModeVar 
*          1    00000d01    00000001     UNINITIALIZED
                  00000d01    00000001     DSP2803x_GlobalVariableDefs.obj (EmuBModeVar)

FlashCallbackVar 
*          1    00000d02    00000002     UNINITIALIZED
                  00000d02    00000002     DSP2803x_GlobalVariableDefs.obj (FlashCallbackVar)

FlashScalingVar 
*          1    00000d04    00000002     UNINITIALIZED
                  00000d04    00000002     DSP2803x_GlobalVariableDefs.obj (FlashScalingVar)

Cla1RegsFile 
*          1    00001400    00000040     UNINITIALIZED
                  00001400    00000040     DSP2803x_GlobalVariableDefs.obj (Cla1RegsFile)

ECanaRegsFile 
*          1    00006000    00000034     UNINITIALIZED
                  00006000    00000034     DSP2803x_GlobalVariableDefs.obj (ECanaRegsFile)

ECanaLAMRegsFile 
*          1    00006040    00000040     UNINITIALIZED
                  00006040    00000040     DSP2803x_GlobalVariableDefs.obj (ECanaLAMRegsFile)

ECanaMOTSRegsFile 
*          1    00006080    00000040     UNINITIALIZED
                  00006080    00000040     DSP2803x_GlobalVariableDefs.obj (ECanaMOTSRegsFile)

ECanaMOTORegsFile 
*          1    000060c0    00000040     UNINITIALIZED
                  000060c0    00000040     DSP2803x_GlobalVariableDefs.obj (ECanaMOTORegsFile)

ECanaMboxesFile 
*          1    00006100    00000100     UNINITIALIZED
                  00006100    00000100     DSP2803x_GlobalVariableDefs.obj (ECanaMboxesFile)

Comp1RegsFile 
*          1    00006400    00000011     UNINITIALIZED
                  00006400    00000011     DSP2803x_GlobalVariableDefs.obj (Comp1RegsFile)

Comp2RegsFile 
*          1    00006420    00000011     UNINITIALIZED
                  00006420    00000011     DSP2803x_GlobalVariableDefs.obj (Comp2RegsFile)

Comp3RegsFile 
*          1    00006440    00000011     UNINITIALIZED
                  00006440    00000011     DSP2803x_GlobalVariableDefs.obj (Comp3RegsFile)

EPwm1RegsFile 
*          1    00006800    00000040     UNINITIALIZED
                  00006800    00000040     DSP2803x_GlobalVariableDefs.obj (EPwm1RegsFile)

EPwm2RegsFile 
*          1    00006840    00000040     UNINITIALIZED
                  00006840    00000040     DSP2803x_GlobalVariableDefs.obj (EPwm2RegsFile)

EPwm3RegsFile 
*          1    00006880    00000040     UNINITIALIZED
                  00006880    00000040     DSP2803x_GlobalVariableDefs.obj (EPwm3RegsFile)

EPwm4RegsFile 
*          1    000068c0    00000040     UNINITIALIZED
                  000068c0    00000040     DSP2803x_GlobalVariableDefs.obj (EPwm4RegsFile)

EPwm5RegsFile 
*          1    00006900    00000040     UNINITIALIZED
                  00006900    00000040     DSP2803x_GlobalVariableDefs.obj (EPwm5RegsFile)

EPwm6RegsFile 
*          1    00006940    00000040     UNINITIALIZED
                  00006940    00000040     DSP2803x_GlobalVariableDefs.obj (EPwm6RegsFile)

EPwm7RegsFile 
*          1    00006980    00000040     UNINITIALIZED
                  00006980    00000040     DSP2803x_GlobalVariableDefs.obj (EPwm7RegsFile)

ECap1RegsFile 
*          1    00006a00    00000020     UNINITIALIZED
                  00006a00    00000020     DSP2803x_GlobalVariableDefs.obj (ECap1RegsFile)

EQep1RegsFile 
*          1    00006b00    00000040     UNINITIALIZED
                  00006b00    00000040     DSP2803x_GlobalVariableDefs.obj (EQep1RegsFile)

LinaRegsFile 
*          1    00006c00    0000004a     UNINITIALIZED
                  00006c00    0000004a     DSP2803x_GlobalVariableDefs.obj (LinaRegsFile)

GpioCtrlRegsFile 
*          1    00006f80    00000040     UNINITIALIZED
                  00006f80    00000040     DSP2803x_GlobalVariableDefs.obj (GpioCtrlRegsFile)

GpioDataRegsFile 
*          1    00006fc0    00000020     UNINITIALIZED
                  00006fc0    00000020     DSP2803x_GlobalVariableDefs.obj (GpioDataRegsFile)

GpioIntRegsFile 
*          1    00006fe0    0000000c     UNINITIALIZED
                  00006fe0    0000000c     DSP2803x_GlobalVariableDefs.obj (GpioIntRegsFile)

SysCtrlRegsFile 
*          1    00007010    00000020     UNINITIALIZED
                  00007010    00000020     DSP2803x_GlobalVariableDefs.obj (SysCtrlRegsFile)

SpiaRegsFile 
*          1    00007040    00000010     UNINITIALIZED
                  00007040    00000010     DSP2803x_GlobalVariableDefs.obj (SpiaRegsFile)

SciaRegsFile 
*          1    00007050    00000010     UNINITIALIZED
                  00007050    00000010     DSP2803x_GlobalVariableDefs.obj (SciaRegsFile)

NmiIntruptRegsFile 
*          1    00007060    00000010     UNINITIALIZED
                  00007060    00000010     DSP2803x_GlobalVariableDefs.obj (NmiIntruptRegsFile)

XIntruptRegsFile 
*          1    00007070    00000010     UNINITIALIZED
                  00007070    00000010     DSP2803x_GlobalVariableDefs.obj (XIntruptRegsFile)

AdcRegsFile 
*          1    00007100    00000050     UNINITIALIZED
                  00007100    00000050     DSP2803x_GlobalVariableDefs.obj (AdcRegsFile)

SpibRegsFile 
*          1    00007740    00000010     UNINITIALIZED
                  00007740    00000010     DSP2803x_GlobalVariableDefs.obj (SpibRegsFile)

I2caRegsFile 
*          1    00007900    00000022     UNINITIALIZED
                  00007900    00000022     DSP2803x_GlobalVariableDefs.obj (I2caRegsFile)

.ebss      1    00009000    000000da     UNINITIALIZED
                  00009000    00000084     Message.obj (.ebss)
                  00009084    0000001b     Diagnostic.obj (.ebss)
                  0000909f    00000001     --HOLE--
                  000090a0    00000018     DSP2803x_CpuTimers.obj (.ebss)
                  000090b8    00000006     power_mgr.obj (.ebss)
                  000090be    00000002     --HOLE--
                  000090c0    00000012     Main.obj (.ebss)
                  000090d2    00000004     rts2800_ml.lib : _lock.obj (.ebss)
                  000090d6    00000004                    : exit.obj (.ebss)

PartIdRegsFile 
*          1    003d7e80    00000001     UNINITIALIZED
                  003d7e80    00000001     DSP2803x_GlobalVariableDefs.obj (PartIdRegsFile)

CsmPwlFile 
*          1    003f7ff8    00000008     UNINITIALIZED
                  003f7ff8    00000008     DSP2803x_GlobalVariableDefs.obj (CsmPwlFile)


GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name 

address    name
--------   ----
00008000   .text
00008640   C$$EXIT
0000826e   FS$$MPY
0000850e   FS$$TOL
00008777   _ADCINT1_ISR
0000877c   _ADCINT2_ISR
00008781   _ADCINT3_ISR
00008786   _ADCINT4_ISR
0000878b   _ADCINT5_ISR
00008790   _ADCINT6_ISR
00008795   _ADCINT7_ISR
0000879a   _ADCINT8_ISR
0000879f   _ADCINT9_ISR
00007100   _AdcRegs
00000b00   _AdcResult
000087a4   _CLA1_INT1_ISR
000087a9   _CLA1_INT2_ISR
000087ae   _CLA1_INT3_ISR
000087b3   _CLA1_INT4_ISR
000087b8   _CLA1_INT5_ISR
000087bd   _CLA1_INT6_ISR
000087c2   _CLA1_INT7_ISR
000087c7   _CLA1_INT8_ISR
000086cb   _CalcDiagPeriod
00008717   _CalcRpmFrequency
00001400   _Cla1Regs
00006400   _Comp1Regs
00006420   _Comp2Regs
00006440   _Comp3Regs
0000855f   _ConfigCpuTimer
000090b0   _CpuTimer0
00000c00   _CpuTimer0Regs
000090a0   _CpuTimer1
00000c08   _CpuTimer1Regs
000090a8   _CpuTimer2
00000c10   _CpuTimer2Regs
003f7ff8   _CsmPwl
00000ae0   _CsmRegs
000087cc   _DATALOG_ISR
0000874e   _DSP28x_DisableInt
00008752   _DSP28x_RestoreInt
00008a8f   _DSP28x_nsDelay
00008a8b   _DSP28x_usDelay
000090bb   _DelayShutdown
00000880   _DevEmuRegs
0000908b   _DiagDutyActiveState
00009084   _DiagDutyCycle
00008a01   _DiagEntryEvent
00009087   _DiagEventArray
00008a05   _DiagExitEvent
00009094   _DiagMsgActiveEventsByPriority
0000908a   _DiagMsgDirty
00008755   _DiagMsgMonitor
00009089   _DiagMsgPriority
000089f6   _DiagMsgPriorityDuty
0000908e   _DiagPeriod
0000908c   _DiagState_TxCount
00008a03   _DiagTmEvent
00008746   _DisableDog
000087d1   _ECAN0INTA_ISR
000087d6   _ECAN1INTA_ISR
000087db   _ECAP1_INT_ISR
00006040   _ECanaLAMRegs
000060c0   _ECanaMOTORegs
00006080   _ECanaMOTSRegs
00006100   _ECanaMboxes
00006000   _ECanaRegs
00006a00   _ECap1Regs
000087e0   _EMUINT_ISR
000087e5   _EPWM1_INT_ISR
000087ea   _EPWM1_TZINT_ISR
000087ef   _EPWM2_INT_ISR
000087f4   _EPWM2_TZINT_ISR
000087f9   _EPWM3_INT_ISR
000087fe   _EPWM3_TZINT_ISR
00008803   _EPWM4_INT_ISR
00008808   _EPWM4_TZINT_ISR
0000880d   _EPWM5_INT_ISR
00008812   _EPWM5_TZINT_ISR
00008817   _EPWM6_INT_ISR
0000881c   _EPWM6_TZINT_ISR
00008821   _EPWM7_INT_ISR
00008826   _EPWM7_TZINT_ISR
00006800   _EPwm1Regs
00006840   _EPwm2Regs
00006880   _EPwm3Regs
000068c0   _EPwm4Regs
00006900   _EPwm5Regs
00006940   _EPwm6Regs
00006980   _EPwm7Regs
0000882b   _EQEP1_INT_ISR
00006b00   _EQep1Regs
00000d01   _EmuBMode
00000d00   _EmuKey
00008721   _EnableInterrupts
00009086   _FaultDiagDutyCycle
003ffe81   _Flash2803x_ToggleTest
000088f4   _FlashCallbackFunction
00000a80   _FlashRegs
00000d04   _Flash_CPUScaleFactor
00000d02   _Flash_CallbackPtr
000084b7   _GetPriorityDutyByIndex
00006f80   _GpioCtrlRegs
00006fc0   _GpioDataRegs
00006fe0   _GpioIntRegs
00008830   _I2CINT1A_ISR
00008835   _I2CINT2A_ISR
00007900   _I2caRegs
0000883a   _ILLEGAL_ISR
0000883f   _INT13_ISR
00008844   _INT14_ISR
00008398   _InitCpuTimers
00008314   _InitEPwm
00008659   _InitFlashloader
00008000   _InitGpio
0000869a   _InitMessaging
00008413   _InitPeripheralClocks
00008607   _InitPieCtrl
0000866f   _InitPieVectTable
000083d7   _InitPll
00008849   _InitSysClocks
00008584   _InitSysCtrl
000086ab   _IntOsc1Sel
0000884e   _LIN0INTA_ISR
00008853   _LIN1INTA_ISR
00008858   _LUF_ISR
0000885d   _LVF_ISR
00009090   _LastDiagPeriod
00006c00   _LinaRegs
00008626   _Monitor_Wakeup
00008862   _NMI_ISR
00007060   _NmiIntruptRegs
00008867   _PIE_RESERVED
003d7e80   _PartIdRegs
00000ce0   _PieCtrlRegs
00000d00   _PieVectTable
000088f6   _PieVectTableInit
0000875c   _PowerMgr
0000810d   _ProcessLin
0000886c   _RTOSINT_ISR
00008871   _SCIRXINTA_ISR
00008876   _SCITXINTA_ISR
0000887b   _SPIRXINTA_ISR
00008880   _SPIRXINTB_ISR
00008885   _SPITXINTA_ISR
0000888a   _SPITXINTB_ISR
00007050   _SciaRegs
000088f1   _SetDBGIER
000088ed   _SetDiagPeriod
00007040   _SpiaRegs
00007740   _SpibRegs
000088e9   _Start
00007010   _SysCtrlRegs
00000985   _SysPwrCtrlRegs
0000888f   _TINT0_ISR
00008537   _Tasks
000090ca   _TimerDiff
000090c8   _TimerOffset
00008894   _USER10_ISR
00008899   _USER11_ISR
0000889e   _USER12_ISR
000088a3   _USER1_ISR
000088a8   _USER2_ISR
000088ad   _USER3_ISR
000088b2   _USER4_ISR
000088b7   _USER5_ISR
000088bc   _USER6_ISR
000088c1   _USER7_ISR
000088c6   _USER8_ISR
000088cb   _USER9_ISR
000088d0   _WAKEINT_ISR
0000872b   _WaitForPllLock
000090b8   _WakeLevel
000090b9   _WakeState
000088d5   _XINT1_ISR
000088da   _XINT2_ISR
000088df   _XINT3_ISR
00007070   _XIntruptRegs
000003d0   __STACK_END
00000380   __STACK_SIZE
ffffffff   ___binit__
ffffffff   ___c_args__
00008a07   ___cinit__
000088f5   ___etext__
ffffffff   ___pinit__
00008000   ___text__
000090d6   __cleanup_ptr
000090d8   __dtors_ptr
000090d4   __lock
0000873d   __nop
00008739   __register_lock
00008735   __register_unlock
00000050   __stack
000090d2   __unlock
00008640   _abort
00009002   _bResponseReady
00008357   _c_int00
000086da   _cpu_timer1_isr
00009088   _eDiagState
000090ba   _ePwrState
00008642   _exit
000085a7   _fDiagState_DIAGST_EPILOGUE
000085c7   _fDiagState_DIAGST_FAULT
000085e7   _fDiagState_DIAGST_IDLE
000082c8   _fDiagState_DIAGST_PROLOGUE
000086bb   _fPwrState_PWRST_OFF
00008700   _fPwrState_PWRST_ON
00008685   _fPwrState_PWRST_SHUTDOWN
000090c1   _fTimer_1_Msec
00008482   _main
0000876a   _memset
000090ce   _pApplSig
00009006   _pResponseCompleteCallback
00009092   _pfnDiagState
000090bc   _pfnPwrState
000088e4   _rsvd_ISR
000090c3   _w100_ms
000090c6   _w10_ms
000090c4   _w1Sec
000090c0   _w1_ms
000090c7   _w20_ms
000090c2   _w3_ms
000090cc   _wDelayCount
000090c5   _wNm20_ms
000090d0   _wOsTimeMsec
ffffffff   binit
003f7ff6   bootstart
00008a07   cinit
000088f5   etext
ffffffff   pinit


GLOBAL SYMBOLS: SORTED BY Symbol Address 

address    name
--------   ----
00000050   __stack
00000380   __STACK_SIZE
000003d0   __STACK_END
00000880   _DevEmuRegs
00000985   _SysPwrCtrlRegs
00000a80   _FlashRegs
00000ae0   _CsmRegs
00000b00   _AdcResult
00000c00   _CpuTimer0Regs
00000c08   _CpuTimer1Regs
00000c10   _CpuTimer2Regs
00000ce0   _PieCtrlRegs
00000d00   _EmuKey
00000d00   _PieVectTable
00000d01   _EmuBMode
00000d02   _Flash_CallbackPtr
00000d04   _Flash_CPUScaleFactor
00001400   _Cla1Regs
00006000   _ECanaRegs
00006040   _ECanaLAMRegs
00006080   _ECanaMOTSRegs
000060c0   _ECanaMOTORegs
00006100   _ECanaMboxes
00006400   _Comp1Regs
00006420   _Comp2Regs
00006440   _Comp3Regs
00006800   _EPwm1Regs
00006840   _EPwm2Regs
00006880   _EPwm3Regs
000068c0   _EPwm4Regs
00006900   _EPwm5Regs
00006940   _EPwm6Regs
00006980   _EPwm7Regs
00006a00   _ECap1Regs
00006b00   _EQep1Regs
00006c00   _LinaRegs
00006f80   _GpioCtrlRegs
00006fc0   _GpioDataRegs
00006fe0   _GpioIntRegs
00007010   _SysCtrlRegs
00007040   _SpiaRegs
00007050   _SciaRegs
00007060   _NmiIntruptRegs
00007070   _XIntruptRegs
00007100   _AdcRegs
00007740   _SpibRegs
00007900   _I2caRegs
00008000   .text
00008000   _InitGpio
00008000   ___text__
0000810d   _ProcessLin
0000826e   FS$$MPY
000082c8   _fDiagState_DIAGST_PROLOGUE
00008314   _InitEPwm
00008357   _c_int00
00008398   _InitCpuTimers
000083d7   _InitPll
00008413   _InitPeripheralClocks
00008482   _main
000084b7   _GetPriorityDutyByIndex
0000850e   FS$$TOL
00008537   _Tasks
0000855f   _ConfigCpuTimer
00008584   _InitSysCtrl
000085a7   _fDiagState_DIAGST_EPILOGUE
000085c7   _fDiagState_DIAGST_FAULT
000085e7   _fDiagState_DIAGST_IDLE
00008607   _InitPieCtrl
00008626   _Monitor_Wakeup
00008640   C$$EXIT
00008640   _abort
00008642   _exit
00008659   _InitFlashloader
0000866f   _InitPieVectTable
00008685   _fPwrState_PWRST_SHUTDOWN
0000869a   _InitMessaging
000086ab   _IntOsc1Sel
000086bb   _fPwrState_PWRST_OFF
000086cb   _CalcDiagPeriod
000086da   _cpu_timer1_isr
00008700   _fPwrState_PWRST_ON
00008717   _CalcRpmFrequency
00008721   _EnableInterrupts
0000872b   _WaitForPllLock
00008735   __register_unlock
00008739   __register_lock
0000873d   __nop
00008746   _DisableDog
0000874e   _DSP28x_DisableInt
00008752   _DSP28x_RestoreInt
00008755   _DiagMsgMonitor
0000875c   _PowerMgr
0000876a   _memset
00008777   _ADCINT1_ISR
0000877c   _ADCINT2_ISR
00008781   _ADCINT3_ISR
00008786   _ADCINT4_ISR
0000878b   _ADCINT5_ISR
00008790   _ADCINT6_ISR
00008795   _ADCINT7_ISR
0000879a   _ADCINT8_ISR
0000879f   _ADCINT9_ISR
000087a4   _CLA1_INT1_ISR
000087a9   _CLA1_INT2_ISR
000087ae   _CLA1_INT3_ISR
000087b3   _CLA1_INT4_ISR
000087b8   _CLA1_INT5_ISR
000087bd   _CLA1_INT6_ISR
000087c2   _CLA1_INT7_ISR
000087c7   _CLA1_INT8_ISR
000087cc   _DATALOG_ISR
000087d1   _ECAN0INTA_ISR
000087d6   _ECAN1INTA_ISR
000087db   _ECAP1_INT_ISR
000087e0   _EMUINT_ISR
000087e5   _EPWM1_INT_ISR
000087ea   _EPWM1_TZINT_ISR
000087ef   _EPWM2_INT_ISR
000087f4   _EPWM2_TZINT_ISR
000087f9   _EPWM3_INT_ISR
000087fe   _EPWM3_TZINT_ISR
00008803   _EPWM4_INT_ISR
00008808   _EPWM4_TZINT_ISR
0000880d   _EPWM5_INT_ISR
00008812   _EPWM5_TZINT_ISR
00008817   _EPWM6_INT_ISR
0000881c   _EPWM6_TZINT_ISR
00008821   _EPWM7_INT_ISR
00008826   _EPWM7_TZINT_ISR
0000882b   _EQEP1_INT_ISR
00008830   _I2CINT1A_ISR
00008835   _I2CINT2A_ISR
0000883a   _ILLEGAL_ISR
0000883f   _INT13_ISR
00008844   _INT14_ISR
00008849   _InitSysClocks
0000884e   _LIN0INTA_ISR
00008853   _LIN1INTA_ISR
00008858   _LUF_ISR
0000885d   _LVF_ISR
00008862   _NMI_ISR
00008867   _PIE_RESERVED
0000886c   _RTOSINT_ISR
00008871   _SCIRXINTA_ISR
00008876   _SCITXINTA_ISR
0000887b   _SPIRXINTA_ISR
00008880   _SPIRXINTB_ISR
00008885   _SPITXINTA_ISR
0000888a   _SPITXINTB_ISR
0000888f   _TINT0_ISR
00008894   _USER10_ISR
00008899   _USER11_ISR
0000889e   _USER12_ISR
000088a3   _USER1_ISR
000088a8   _USER2_ISR
000088ad   _USER3_ISR
000088b2   _USER4_ISR
000088b7   _USER5_ISR
000088bc   _USER6_ISR
000088c1   _USER7_ISR
000088c6   _USER8_ISR
000088cb   _USER9_ISR
000088d0   _WAKEINT_ISR
000088d5   _XINT1_ISR
000088da   _XINT2_ISR
000088df   _XINT3_ISR
000088e4   _rsvd_ISR
000088e9   _Start
000088ed   _SetDiagPeriod
000088f1   _SetDBGIER
000088f4   _FlashCallbackFunction
000088f5   ___etext__
000088f5   etext
000088f6   _PieVectTableInit
000089f6   _DiagMsgPriorityDuty
00008a01   _DiagEntryEvent
00008a03   _DiagTmEvent
00008a05   _DiagExitEvent
00008a07   ___cinit__
00008a07   cinit
00008a8b   _DSP28x_usDelay
00008a8f   _DSP28x_nsDelay
00009002   _bResponseReady
00009006   _pResponseCompleteCallback
00009084   _DiagDutyCycle
00009086   _FaultDiagDutyCycle
00009087   _DiagEventArray
00009088   _eDiagState
00009089   _DiagMsgPriority
0000908a   _DiagMsgDirty
0000908b   _DiagDutyActiveState
0000908c   _DiagState_TxCount
0000908e   _DiagPeriod
00009090   _LastDiagPeriod
00009092   _pfnDiagState
00009094   _DiagMsgActiveEventsByPriority
000090a0   _CpuTimer1
000090a8   _CpuTimer2
000090b0   _CpuTimer0
000090b8   _WakeLevel
000090b9   _WakeState
000090ba   _ePwrState
000090bb   _DelayShutdown
000090bc   _pfnPwrState
000090c0   _w1_ms
000090c1   _fTimer_1_Msec
000090c2   _w3_ms
000090c3   _w100_ms
000090c4   _w1Sec
000090c5   _wNm20_ms
000090c6   _w10_ms
000090c7   _w20_ms
000090c8   _TimerOffset
000090ca   _TimerDiff
000090cc   _wDelayCount
000090ce   _pApplSig
000090d0   _wOsTimeMsec
000090d2   __unlock
000090d4   __lock
000090d6   __cleanup_ptr
000090d8   __dtors_ptr
003d7e80   _PartIdRegs
003f7ff6   bootstart
003f7ff8   _CsmPwl
003ffe81   _Flash2803x_ToggleTest
ffffffff   ___binit__
ffffffff   ___c_args__
ffffffff   ___pinit__
ffffffff   binit
ffffffff   pinit

[230 symbols]
    Here is the Map file.

     

  • 0 in reply to tom prohaszka
    TI__Guru* 92130 points

    tom prohaszka said:

    This is occuring during RAM Debug.  It appears the code is loaded first at 0x8000, then it is overlayed with the csm reserved and csmpassword.   By changing the order, I think all I've done was ensure code is overlayed last so it's not corrupted.   This code will always run from RAM, it's part of a bootloaer we are writting, so it will never run from Flash.

     

    Thank you Tom.

    Unfortunately I am not finding an obvious issue in either the .cmd file or the .map file.  Nothing overlaps at 0x8000 except .pinit which is not being used.   L0 is mirrored at 0x3F8000 but I do not see anything there. 

    Does the overlay happen just when you load the project or when the CPU is executing code?   If the latter then the next step is to narrow down where in the code this occurs.

    Two more thoughts:

    •  L0 is protected by the code security module.  This module gets locked anytime the device is reset.  If it is locked then the L0 memory will read back 0x0000.  Could it be that code composer loads the .out file and then after a reset the memory shows up as all 0x0000?     Try opening a memory window to 0x3f7ff8-0x3f7fff - this will perform a read of the CSM password and unlock it.  You may need to refresh the memory window after the unlock.
    • There is also an errata on this device that "Reads of addresses 0x3D 7FF8–0x3D 7FFF will activate the CSM, locking the device".  Is this a possibility? It could be a read through a memory window or a watch window or the CPU.   More information here: www.ti.com/lit/SPRZ295E.

    Regards,

    Lori

     

  • 0 in reply to Lori Heustess
    Expert 1240 points

    Lori,  the overlay occurs during program load from Code Composer v4.  It's evident from the memory window that the code is overlayed by both the CSM reserved and CSM password values.  I don't believe the CSM is locked, as I verified the flash section was properly programed with the CSM data. 

    It appears that the CSM is being treated as a .text section by the jtag loader, and since our .text is at 0x8000, this is where it is being overlayed.

    How are bugs reported against CCSv4?

     

  • 0 in reply to tom prohaszka
    TI__Guru* 92130 points

    tom prohaszka said:
    How are bugs reported against CCSv4?

    Tom,

    I am going to move the thread to the code composer forum for the experts there to look at.    The link to the thread will continue to work after the move.

    Regards,

    Lori

  • 0 in reply to tom prohaszka
    TI__Guru**** 173310 points

    tom prohaszka said:

    It appears that the CSM is being treated as a .text section by the jtag loader, and since our .text is at 0x8000, this is where it is being overlayed.

    Which version of CCS4 are you using?

    Would it be possible for you to send us a complete test case that demonstrates this issue so we can reproduce it at our end? If you prefer to not attach the project here on a public forum, you can send to me via private conversation.

  • 0 in reply to AartiG
    Expert 1240 points

    5314.test.zip

    we are using v4.2.3, for C2000 family.

    Attached is a test.7z file that exhibits the problem.  You can see the issue by opening a memory window at 0x8000.   All you need to do is start a debug session, no need to run.   You will see the InitGPIO function at 0x8000.   Now, in the RAM_LINKER.CMD file, move the sections as follows to see the issue.

    move sections csmpasswds and csm_rsvd BEFORE the .cinit section, the problem DOES NOT occur

    move sections csmpasswds and csm_rsvd AFTTER the ramfuncs section, the problem DOES OCCURS.

    What you will see in the memory window is that the InitGPIO function is overlayed with the CSM Reserved initialization byte of 0x00 and the CSM Password of 0xFFFF...

  • 0 in reply to tom prohaszka
    Expert 1240 points

    Did you confirm the issue?

  • 0 in reply to tom prohaszka
    TI__Guru**** 173310 points

    I was able to duplicate the issue but I don't have an explanation yet on why it is happening. The link map files for the 2 cases are exactly the same so I believe the executables themselves are the same, so it is not clear to me why a portion of the memory at RAM (0x8000) is getting the csm_rsvd data. I'll continue looking into it and post an update when I have additional information.

  • 0 in reply to AartiG
    TI__Guru* 92130 points

    Tom, Aarti,

    I have a theory that it is the flash programmer.  I don't think it is loading the RAM sections after it is finished programming.   It may be loading them *before* the programming and thus they get clobbered with the programming data.

    I tried the following:

    • Flash code  (load .out)
    • checked and see 0x8000 is corrupted
    • changed the flash programmer setting to load RAM only
    • Load code
    • 0x8000 is correct

    For the time being if your code in flash is not changing then you can try the sequence above.  The flash settings are under tools->on-chip flash.  Here you can select "load RAM sections only".  Will this work to get you going for now?

    Aarti and I will need to check with the flash programmer owner to see if my theory is correct. 

    Regards,

    Lori

     

     

     

     

  • 0 in reply to Lori Heustess
    TI__Guru* 92130 points

    This has been logged into the tracking system as SDSCM00040313

  • 0 in reply to Lori Heustess
    Expert 1240 points

    I don't think that is the case.  The application is targeted to RAM, except for a boot entry and CSM which are located at the proper locations.  The behavior is that the CSM is being written to RAM as well as FLASH.   The RAM write is also at the wrong offset.  Maybe there are multiple or related behaviors.  Thanks.

    Tom

  • 0 in reply to tom prohaszka
    TI__Guru* 92130 points

    tom prohaszka said:

    I don't think that is the case.  The application is targeted to RAM, except for a boot entry and CSM which are located at the proper locations.  The behavior is that the CSM is being written to RAM as well as FLASH.   The RAM write is also at the wrong offset.  Maybe there are multiple or related behaviors.  Thanks.

    Tom

    Tom,

    Programming the device involves the CPU.  An algorithm is loaded down to the RAM and it is given buffers of data to program.  The CPU itself executes the algorithm that does the programming.  I believe what you see is the buffer of data that was given to the programming algorithm by CCS when it programmed the CSM sections.

    CCS should have loaded the RAM sections after it finished with the programming algorithm.

     

    Cheers,

    Lori