I want to evaluate an algorithm that i would like to implement on the TMS320C6455. First, I'm debugging the application on the C6455 Device Cycle Accurate Simulator, Little Endian.
When I execute my program I obtain a number of executed instructions smaller than the number of elapsed clock cycles. If each functional unit of the DSP is able to execute an instruction per clock cycle, the number of executed instructions should be higher than the number of elapsed clock cycles, shouldn't it? Is this result normal?
Is there any document about the profiler functionality? Thank you very much in advanced.
Maria
