• State Resolved
  • Locked Locked
  • Replies 5 replies
  • Subscribers 53 subscribers
  • Views 1442 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DMC error

Vijay Kumar76561
Prodigy 190 points

Hi,

I am getting the below mentioned error which says:

TMS320C64+: Error: DMC Error: Non Aligned access to the configuration space address 0x01fc0c59.

 

Problem Description:

I have been using a project since 1 month. And recently I have added a very large float array required for an application and since then I am getting this error. I removed the large array from the project but even then the error did not go.

I get this when I load the project. After loading even before coming to main, this error occurs. which means that there is something going wrong during init. I am unable to figure out what it is.

One more input is I have not included explicitly any cmd file. And to add to my worry, I am unable to know how the sections are getting allocated. BTW I am using CCS v4.2, C64X+ mega module cycle accurate simulator. {C6421 Cache configuration is L1P - 32K, L1D - 48k and L2 - 128K (SRAM).}

Also one more thing is if I select, C64x+ CPU cycle  accurate simulator, then I don't get any error.

 

Thanks for any help. Please let me know in case more inputs are required.

 

Regards,

Vijay

 

  • 0
    TI__Intellectual 1380 points

    Hi Vijay,

     

    It looks like the data section is being mapped to configuration-space memory-mapped addresses. The RTS library would attempt to initilize these (global) data structures with default values. This RTS lib would come into play before the core (executing on the simulator/hardware) reaches the main() function. And, this intialization code seems to initialize these structures with non-word-aligned accesses and hence you get this error. The reason that you dont get this error on the CPU cycle accurate simulator, is that that simulator variant does not model these error checks.

    I would recommend that you should a valid linker command file and place the data, code, stack and other sections into valid memory region (like the L2 RAM or the external memory space). This should solve the problem. LMK if you still face the problem.

     

    Regards,

    Nizam

  • 0 in reply to Nizamudheen A
    Prodigy 190 points

    Hi Nizam,

    Thanks for the reply. As I mentioned in the first post, I am not able to get a sample linker command (cmd) file for C64x+ processor. Appreciate, if you can share a sample cmd file with which I can start.

     

    Regards,

    Vijay

  • 0 in reply to Nizamudheen A
    Prodigy 190 points

    Hi Nizam,

    Thanks a lot for that pointer.. It indeed solved my problem. I moved some part to SDRAM. And I was able to build and run without any error.

    The link below helped me in getting more information about the linker file (assembly language tools user guide.)

    http://focus.ti.com/lit/ug/spru186q/spru186q.pdf

     

    The default allocation for C6000 deviced would be

    MEMORY
    {
    RAM : origin = 0x00000001, length = 0xFFFFFFFE
    }
    SECTIONS
    {
    .text : ALIGN(32) {} > RAM
    .const : ALIGN(8) {} > RAM
    .data : ALIGN(8) {} > RAM
    .bss : ALIGN(8) {} > RAM
    .cinit : ALIGN(4) {} > RAM
    .pinit : ALIGN(4) {} > RAM
    .stack : ALIGN(8) {} > RAM
    .far : ALIGN(8) {} > RAM
    .sysmem: ALIGN(8) {} > RAM
    .switch: ALIGN(4) {} > RAM
    .cio : ALIGN(4) {} > RAM
    }

     

    Regards,

    Vijay

  • 0 in reply to Vijay Kumar76561
    TI__Intellectual 1380 points

    Hi Vijay,

    Thats great.

     

    Regards,

    Nizam