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why nonaligned load/store and pack4 instructions do not work on c67x?

Akshey Vasishth
Prodigy 10 points


Hi all,

I have c64x intrinsic ocde, in which spacku4, dotpsu4, packu4 , mem8 intinsics are used.

I am porting the same on c67x. According to manual above intrinsics are not supported for c67x.

Though the architecture of both the processors is same, why these instructions are not working on c67x?

Is there some other instructions or some other way in which these can work.

Please note that pack instructins are giving a good gain on c64x device.

Kindly help.

 

 

 

 

  • 0
    TI__Guru**** 171254 points

    Hi,

    Akshey Vasishth said:

    I am porting the same on c67x. According to manual above intrinsics are not supported for c67x.

    Though the architecture of both the processors is same, why these instructions are not working on c67x?

    Well, I guess you answered yourself...

    The C67x architecture (floating-point) is contemporary to the C62x (fixed-point) and therefore one generation older than the C64x (also fixed-point). One of the main benefits of the C64x is the additional data-packing instructions that allowed even better performance. Therefore they are not supported in C67x.

    Akshey Vasishth said:

    Is there some other instructions or some other way in which these can work.

    Please note that pack instructins are giving a good gain on c64x device.

    I can't think of any instructions that can help you, but I am not an expert on the device itself. However, if you need the floating-point capabilities I suggest checking the C674x (floating-point), which is contemporary to the C64x+ architecture (fixed-point) and sports similar data-packing characteristics. Check the intrinsics section in the Compiler User's Guide (link here).

    Hope this helps,

    Rafael