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hex6x generating srec with -cr linker option

I've been running a 6482 using the -c (ROM Model) and all is well...

I'd like to switch to the -cr (RAM Model) to save memory (the redundant .cinit region).  The RAM Model works fine when I load using Code Composer and an emulator, but when I try to generate a srec (for my target platform) using hex6x.exe  it does not work.

From looking at the srec file, it appears that the hex6x does not copy the initialization values from .cinit into the .far region.  Should hex6x be able to do this?  Is there an option I need to turn on?

The User Guide says:

A loader must be able to perform the following tasks to use initialization at load time:

 

 

1) Detect the presence of the .cinit section in the object file.

2) Determine that STYP_COPY is set in the .cinit section header, so that it  knows not to copy the .cinit section into memory.

 

3) 

 

 

Understand the format of the initialization tables.

I think hex6x correctly does steps 1 & 2... but I don't think step 3 is getting done.

thanks,

Brad

FYI...  my hex6x cmd file looks like:

..\bin\dsp.out

-m      /* S record (S 322) - asii format */
-memwidth  32     /* 32-bit memory */
-order L                   /* Little Endian */
-map ..\bin\dsp_hex.map    /* create a hex map file */
-o   ..\bin\dsp.srec


ROMS
{
  RAM:    org = 0x00800000, len = 0x00200000, romwidth = 32
}

 

 

  • Brad,

    The hex utility should be able to process the .cinit sections as you expect.

    At what address are these variables for which the initialization values are not correct? Does the ROMS directive cover that address range? If not, does it help if you modify the ROMS directive to span those addresses?

    If that does not help, please provide a small test case that demonstrates the issue so we can recreate the issue and investigate further.

  • Thanks for the response.  I believe the ROMS directive does cover all the address ranges. 

    I put together a small project which I think shows it...

    3782.ramtest.zip

    I built the "ProductionBuild" target with ram_model and with rom_model and saved off the srec and map files in ramtest/Build/ProductionBuild/Dsp.*_with_r*m_model)

    main.c has a bigArray[] which gets initialized.  When I build with rom_model, I can look in the Dsp.srec and see the initialization values (at the .cinit addresses).  When I build with ram_model, I can not find the initialization values in the Dsp.srec.

     thanks,

    Brad

  • Brad,

    Thanks for providing the test case, it really helped. I was able to reproduce the issue and noticed you were using codegen tools v6.0.8. I then rebuilt your project with 6.0.8 but used a newer version of hex6x (6.1.19) and saw the correct values in the hex output. Could you give this version a try and confirm? You can download v6.1.19 tools from the CCS 3.3 Update Advisor page: https://www-a.ti.com/downloads/sds_support/CodeGenerationTools.htm#C6000

    It should be ok to just replace the version of hex6x with this newer one and not your entire codegen toolset. Hope this helps.

  • Yes!  I switched to the 6.1.19 version of hex6x and that did the trick!  I was able to loading using ram_model and the srec.

    thanks for your help!

    Brad