Hi,
I wrote a simple C code to run on the DSP core in the C6A816x chip using CCS v5.0.3. The code was running successfully on the DSP core in C6A816x. Now I am trying to profile the code to figure out how many cycles does it take to finish the job. I attended the TI technology day last week, and was told that the hardware profiler is not supported in CCS v5.0.3 and the cycle accurate simulator should be used to profile the code. Could anybody please tell me how to use the cycle accurate simulator to profile DSP code in CCS v5.0.3 for the C6A816x chip? Any documentations available? Do I have any other options to profile DSP code in CCS v.5.0.3 for heterogeneous multicore SoCs?
Thanks,
Ning