I am getting larger cycle times with the simulator benchmarking the RFFT_f32 method of the DSP library against a 4096 point FFT. When running the library example I get about 135,000 cycles. For FFT sizes that the library documentation benchmarked, my simulation numbers were within a few percent.To get the larger array size I believe I needed to modify the linker command file. This project is built for the F28355.
I created a new project and did my own FFT using the same library function. This project targeted the C28346 (a floating point processor from the same family). The cycle count in this case was about 159,000. At least one version of the similator condsiders memory speed and I am thinking this may be causing the speed difference. Since I am using linker command files for different variants, and have modified them, the memory layout is not the same. I am using the C28X simulator.
Can I configure the memory timing in the simulator? If so how? Is there documenation for this specific simulator.
John