LAUNCHXL-CC1312R1: ccs debug help

Hi Gullik,

Did you see the Debugging guide? We have a lot of useful information in there, both on CCS and a serial interface debugging guide:

https://dev.ti.com/tirex/explore/content/simplelink_cc13xx_cc26xx_sdk_7_41_00_17/docs/proprietary-rf/proprietary-rf-users-guide/proprietary-rf-guide/debugging-index.html

Specifically for registers, you can use the Register view. Just search for Registers in CCS. 

Cheers,

Marie H

Thank you Marie H,

As for registers, I have had a look at them. I can see the SP, and the xPSR which is 0x61000003 which I interpret as exception 3, using the MSP. The SP is in the middle of the stack, but the whole

way down to __stack is filled with data, above __stack_end all is zeroes.

I have been searching for the project properties, i.e. where to set stack allocation but project does

not have any properties (grayed out) and tools profile is not helpful....

Edit: Too simple the .lds file of course....increasing the stack resulted in a larger blank area at the

bottom....but I still get FaultISR. I need to understand the fault stack trace....

It is interesting, I have external ethernet adapters, and I can run ping over long times, but it does not

handle long packets. I can see that they are sent, but shortly after i get the FaultISR...

Regards

Gullik

Examining the CPU_SCS_CFSR register gives 0x00000400, which I guess means

ufaultstat register bit 10, which arm documentation says is "unused"

EDIT: I checked this in the cc1312 manual, and it shows as unused there. I suspected

it was a bit added for this specific variant of cortex. It says "reserved".

failing PC should be 0x536d1 which contains 0xe7fe.

As an instruction this means " b self", which is the code in the FaultISR handler.

This is in a section that begins localProgramStart and ends _fini.

I found this in the simplelink kit,

snip:

/* call apps entry point */

main();

/* if we ever return signal error */

faultISR();

Now, what made us leave main (which in my case is while(1) { code } )?

puzzled....

Gullik

Hi Gullik,

Unless you have disabled interrupts (critical section), the processor will leave main when an interrupt is coming (in this case the fault interrupt.

Cheers,

Marie H

Well, I have learned a lot about cc1312 debugging.

I have analyzed several stack dumps. This is a bit tedious, since I believe the examination could be automated, but I have done it by hand.

The code is based on the rfUARTbridge example in the simplelink kit.

My stack looks like this:

0x20002268 r0
0x0000008F r1
0x00000000 r2
0x20003978 r3
0x0000000A r4
0x0004C1FB r12
0x0004B3FE pc
0x6100020E xpsr           the manual says the trailing E is the interrupt number meaning PendSV

indicating a "os" interrupt. The 200 means bits 7-9 which are reserved.

Puzzled,

Gullik