XDS560v2 not reading I/O registers

Tom Lock

Other Parts Discussed in Thread: DM3730, CODECOMPOSER

I am unable to read/modify I/O registers on a DM3730 development board using an XDS560v2 emulator. I go through the following steps:

* connect everything and apply power
* launch CodeComposer version 4.2
* launch TI debugger (non-project debug session)
* select the Cortex_A8_0 debug thread and tell it to connect target

The processor is halted at this point. I can view CPU registers and memory, but all of the I/O registers (such as the timers) display the value 0xBAD0BAD0.

I am probably missing something very simple, but I have no idea what it might be.

over 14 years ago

0 desouza over 14 years ago

TI__Guru**** 171309 points

Hi,

Can you try to disable the MMU and see if you can have access to the registers? Although it talks about a different architecture (ARM9), the forum thread below shows how to disable it and some expected results.

http://e2e.ti.com/support/development_tools/code_composer_studio/f/81/p/135254/488677.aspx#488677

Hope this helps,

Rafael

0 Jon Hunter over 14 years ago in reply to desouza

TI__Expert 3245 points

If you are running Linux and as Rafael states the MMU is enabled, as nice way non-instrusive way to view registers is by using the DAP controller. See the following wiki page for more details:

http://processors.wiki.ti.com/index.php/Debug_Access_Port_(DAP)

If disabling the MMU does not help, then it may be because the module/peripheral is not clocked/enabled. So try reading any of the PRCM registers as a test as these should always be accessible. Also if it is a particular module you are having problems with let us know which.

Cheers
Jon

0 Tom Lock over 14 years ago in reply to desouza

Prodigy 100 points

Yes, disabling the MMU does the trick. As long as I re-enable it before running again, all is well. Thanks

0 Tom Lock over 14 years ago in reply to Jon Hunter

Prodigy 100 points

Disabling the MMU allows me to see the registers, but the DAP controller does not show up as one of my debug sessions. All I have is C64XP, Cortex_A8, and CSETB. Let me know if there is a way of connecting to the DAP as well, since disabling and re-enabling the MMU is not overly convenient.

Thanks
TL

0 Jon Hunter over 14 years ago in reply to Jon Hunter

TI__Expert 3245 points

By default the DAP is hidden as not to clutter the view. However, you can enable this as described here ...

http://processors.wiki.ti.com/index.php/Debug_Access_Port_(DAP)#Connect_to_ICEPICK_and_DAP_2

This is based upon CCSv4 and I should update the article for CCSv5 to see if there are any differences.

Please note that an alternative to disabling the MMU is entering the virtual address in the memory view. The virtual address is simply the physical address plus an offset. I am not sure what kernel version you are looking at but for 2.6.35 the mapping could be found in arch/arm/plat-omap/include/plat/io.h.

Cheers
Jon

0 Tom Lock over 14 years ago in reply to Jon Hunter

Prodigy 100 points

Thanks. I've gotten DAP and the virtual address offset both working. DAP has the advantage of being able to read/modify while the CPU is running. No matter what I do, though, there seems to be an unpredictable delay between changing a register (in this case, pixels per line) and seeing the result.

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XDS560v2 not reading I/O registers