Part Number: MSP430G2332
Dear friends :
My problem is as followings:
Assembly program by IAR is work correctly. But, almost same Assembly program by CCS is not work as by IAR.
The IAR assembly program and CCS project fold are attached.
main.asm AS-V9-128-flash-Fewrite-Fix-2026b-s43.txt
I need help !
Thanks to all !
Marshall Wu 2026/03/19
Hello Marshall,
Did you use assembly as below steps? And in fact, we have one guide, maybe you can try to check whether you can find what you want in the guide
MSP430 Assembly Language Tools v16.9.0.LTS (Rev. M)
Best Regards,
Janz Bai
Dear Janz Bai:
Thanks a lot for your prompt response.
CCS assemble program make to generate *.out is ok!
The problem is the hardware interrupt response too slow, so certain function are not work as program make by IAR.
Could you tell me how to solve such kind of problem ?
how to speed-up the interrupt response time ?
Best regards;
Marshll Wu 2026/03019
IAR ***.S43 can not be accept by system, So ***.S43 change to ***-s43.txt
#include "msp430g2332.h" ; #define controlled include file
//******************************************************************************
// AddrSdModule
// address: A0~A6 = p1.7,p2.1,p2.2,p2.3,p2.4,p2.5,p2.6
// R-LED=p1.4, G-LED=p1.6, ACK=PB1=p1.1
// OP-pwr=p1.3, Ain=P1.0 AD-10 ch1, PIR-p1.2 output
// clk=p1.5, data=p2.0 ack=p1.1
// Built with IAR Embedded Workbench Version: 6.40
//******************************************************************************
// the last 3 sum >160/170 alarm otherwise normal 2013/09/25
// >=53 alarm else normal 2013/09/14
// >=55 alarm else normal 2013/09/16
// SdDetecor.s43 copied from TdDetector.s43 2013/06/25
//TdDetector copied from SmartaNew1221.s43 2013/06/24
//Program SmartaNew1221.s43 COPIED FROM SmartaNew1102.s43 FOR max bitcnt=16
// variable declare segment
// AddrSdDetector-V2 copied from AddrSdDetector-V1 2014/02/11
// AddrSdDetector-V3 copied from AddrSdDetector-V2 2014/02/19
// greater than 0x8d then count 3 up, if less than 0x8d then decrese 1
// PB6=p1.4 no PB7=P1.6 Green LED 2014/04/17
// use enhance gain 12.5% for stable after 1st alarm level. 2014/04/21
// use sum-up the last 5 samples to determinate the alarm level 650 ALRMW
// add fault function if OP output less than #40 means skoke charmber dirty
// update from AddrSdDetector-V61.s43 2014/05/14
// update from V7 for ignor #128 cmp, and twice to alarm
// update from V8 for 256 node
//2014/07/18 tested OK! by Marshall
//2014/11/10 AddrSdDetector-V8-256a.s43 enhance gain 1/4=25%
//MOV #WDTPW+WDTCNTCL+WDTSSEL,&WDTCTL ; watchdog timer 2014/12/03
//2015/01/06 switch to -VT for debug !
//2015/05/11 alarm = 650 single =130 max.alarmcnt 6
//2015/10/02 modify p1.6 for testing command
//2015/11/27 use base value to adjust the measure result.
//standard base value=69; Adj=69*64/Base-n then value * Adj / 64
// copy from AddrSdModule-Type2a-V9-Fe-20160129-ADJ 2024/12/03
// MOV #120,&FireVal ;modify this vale for sensibility of smoke 2025/02/17
//copy from AddrSd-128-14Type2a-V9-Fe-20241203-ADJ -RLY 2025/11/24
//remove fault detector charmber dirty
//copy from AddrSd-128-14Type2a-V9-Fe-20241203-20251125-ADJ -RLY - 188
// add ActFlag to inhibit ADJ function 2025/11/26
//2025/11/29 updated, not test yet !
//
DOCNT EQU 0200h
HICNT EQU 0201h
LASTHI EQU 0202h
ADDR EQU 0203h
CFLAG EQU 0204h
RCVHI EQU 0205h
RCVLO EQU 0206h
STK1 EQU 0207h
CNT4 EQU 0208h
//CNT5 EQU 0209h
SYSAD1 EQU 020Ah
SYSAD2 EQU 020Bh
SYSAD3 EQU 020Ch
DO1 EQU 020Dh
DO2 EQU 020Eh
DO3 EQU 020Fh
DO4 EQU 0210h
DO5 EQU 0211h
CNT1 EQU 0212h
CNT2 EQU 0213h
DFLAG EQU 0214h
BITCNT EQU 0215h
CADDR EQU 0216h
COUT EQU 0217h
CIN EQU 0218h
XMTIN EQU 0219h
WORK EQU 021Ah
LPCNT EQU 021Bh
RLYON EQU 021Ch
FRMCNT EQU 021Dh
FireVal EQU 021Eh ;alarm value-L
CST2 EQU 021Fh ;alarm value-H
ADDRL EQU 0220h ;not use
FCNT1 EQU 0221h ;pooling flash count
DADDR EQU 0222h
EADDR EQU 0223h
BKRLY EQU 0224h
MANFLG EQU 0225h
WARM1 EQU 0226h
WARM2 EQU 0227h
WARM3 EQU 0228h
WARM4 EQU 0229h
PARITY EQU 022Ah
WDCNT EQU 022Bh
WKR2 EQU 022Ch
CCS EQU 022Dh
FSLEEP EQU 022Eh ;SLEEP FLAG
FLASH EQU 022Fh ;FLASH ONCE FOR 10 TIMES ADDRESSED
FAULT EQU 0230h ;FAULT STATUS FLASH COUNT 0=INITIAL
TMCNT EQU 0231h ;TIMER CNT 6/SEC AT 3MHz **************
PORT1IN EQU 0232h ;PORT1 INPUT
PORT2IN EQU 0233h ;PORT2 INPUT
CNT_SET EQU 0234h ;RELAY SET COUNTER 2 5~10 ms
CNT_RST EQU 0235h ;RELAY RESET COUNTER 2 5~10 ms
RLY_FLAG EQU 0236h ;RELAY SETTING FLAG
RLY_STS EQU 0237h ;RELAY STATUS
ADRCNT EQU 0238h ; GET ADDRESS COUNTER
RLYDOX EQU 0239h ;relay check templary work byte
RLYCNT EQU 023Ah ;use for gain and flash led flags.0x12h
SENCNT EQU 023Bh ;SMOKE SENSE TIMER, INITIAL 4S, 2ND 1S, 3RD ALARM
SENTM EQU 023Ch ;smoke sense timer, 10 sec/4 sec/1sec
SENFLAG EQU 023Dh ;sense flag trig smoke sense
TSTCNT EQU 023Eh ;Smoke test cnt
ALMCNT EQU 023Fh ;alarm count
;
SMKD1 EQU 0240h ;DARK SENSE
SMKD2 EQU 0242h ;DARK SENSE
SMKD3 EQU 0244h ;DARK SENSE
SMKD4 EQU 0246h ;DARK SENSE
SMKL1 EQU 0248h ;LIGHT SENSE
SMKL2 EQU 024Ah ;LIGHT SENSE
SMKL3 EQU 024Ch ;LIGHT SENSE
SMKL4 EQU 024Eh ;LIGHT SENSE
SMKR1 EQU 0250h ;avg. of dark sense
SMKR2 EQU 0252h ;acg. of light sense
SMKR3 EQU 0254h ;diff. of light - dark
INDEX EQU 0256h ;LIGHT SENSE
MINW EQU 0258h ;MIN value
MINRSTW EQU 025Ah ;MIN reset value
WORKW EQU 025Ch ;
ALRMW EQU 025Eh ;Alarm value
ADJ EQU 0260h ;adj vaule
STDBASE EQU 0262h ;69 * 64
WORKA EQU 0264h ;
WORKB EQU 0266h
WORKC EQU 0268h
WORKD EQU 026Ah
WORKE EQU 026Ch
LOWEST EQU 026Eh ;LOWEST BASE VALUE
LOWEST1 EQU 026Fh
BIGCNT EQU 0270h ;GREATER COUNTER, ADD 1 IF TEST VALUE > LOWEST
DOCNT16 EQU 0272h
SMKRAW EQU 0274h ;raw data before adiusted.
FEWRT EQU 0276h ;LOWEST SETTED FLAG
ADCFLAG EQU 0278h ;ADC10 Flag
FaulVal EQU 027ah ;fault value = LOWEST / 2;
ActFlag EQU 027ch ;alarm active flag set by alarm, reset as alarm clear 2025/11/26
NorFlag EQU 027dh ;normal running 2025/11/27
LowCnt EQU 027eh ;lower than LOWEST counter
LOGTBL EQU 0280h ;result buffer
;
F_IN EQU 0x01
F_WD EQU 0x02
F_MAT EQU 0x04
F_OUT EQU 0x08
F_BIT EQU 0x10
F_POST EQU 0x20
F_PAS EQU 0x40
F_SYS EQU 0x80
F_RLY EQU 0x80
F_SET EQU 0x01
F_RST EQU 0x10
;
ORG 0F000h
init: MOV #0300h, SP ; set up stack
MOV.B #060h,&DCOCTL
MOV.B #089h,&BCSCTL1 ;89 = 3MHz
CLR.B &BCSCTL2
CLR.B &BCSCTL3
BIC.B #OFIE,&IE1
BIC #LPM4,SR
MOV #100,&ADRCNT
MOV.B #150,&TMCNT ;INITIAL TIMER COUNTER **************
MOV.B #100,&WDCNT
MOV #15000,&TACCR0
MOV #0212h,&TACTL ;INITIAL TIMER_A 1/1, SMCLK, UP MODE
MOV.B #10,&SENTM
MOV.B &SENTM,&SENCNT
CLR.B &SENFLAG
; MOV.B #6,&TMCNT ;INITIAL TIMER COUNTER **************
; MOV #02E2h,&TACTL ;INITIAL TIMER_A **************
CLR.B &CNT_SET
CLR.B &CNT_RST
CLR.B &RLY_FLAG
CLR.B &RLY_STS
CLR.B &DO1
CLR.B &DO2
CLR.B &DO3
CLR.B &RLYON
CLR.B &RLYCNT
CLR.B &ActFlag ;2025/11/26
CLR.B &NorFlag ;2025/11/27
CLR &LowCnt
MOV #LOGTBL,R5
CLR 0(R5)
CLR 2(R5)
CLR 4(R5)
CLR 6(R5)
CLR 8(R5)
CLR 10(R5)
CLR 12(R5)
mov #64,&ADJ
// MOV #180,&FireVal ;modify this vale for sensibility of smoke 2025/02/17 (120->150 2025/11/24)
MOV #270,&FireVal ;modify this vale for sensibility of smoke 2026/03/10 (180->270 2026/03/10) 180*1.5
//SetupWDT mov.w #WDTPW+WDT_ADLY_1000,&WDTCTL ; WDT 1s*4 interval timer
//SetupBC bis.b #DIVA_2,&BCSCTL1 ; ACLK/4
// bis.b #WDTIE,&IE1 ; Enable WDT interrupt
// PORT 1 CONFIGRATION
// MOV.B #0x01,&ADC10AE0 ;enable A0
// MOV.B #0eeh,&P1OUT ;P1 PULL-UP RESISTOR=1110-1110
MOV.B #0eeh,&P1OUT ;P1 PULL-UP RESISTOR=1110-1110 2024/12/03 P1.6 low active
// MOV.B #01eh,&P1DIR ;P1 0001-1110 P1.5 CLK, p1.7 add8,p1.0 ad0, p1.6=test in
MOV.B #05eh,&P1DIR ;P1 0101-1110 P1.5 CLK, p1.7 add8,p1.0 ad0, p1.6=relay output
MOV.B #000h,&P1SEL ;P1.0, p1.3 for ad0, op-pwr, ALL othrs DIGITAL I/O
MOV.B #000h,&P1SEL2
// MOV.B #0A6h,&P1REN ;1010-0110 ENABLE PULL-UP RESISTORS
// MOV.B #0E0h,&P1REN ;1110-0100 ENABLE PULL-UP RESISTORS p1.1 no pull-up/down
MOV.B #0A0h,&P1REN ;1010-0100 ENABLE PULL-UP RESISTORS p1.1 no pull-up/down
MOV.B #020h,&P1IES ;SELECT P1.5 HI->LO EDGE INTERRUPT
CLR.B &P1IFG ;CLEAR INT FLAGS
MOV.B #020h,&P1IE ;ENABLE P1.5 INT clk
// PORT 2 CONFIGURATION
MOV.B #0FFh,&P2OUT ;P2.0,1,4,5,6,7 PULL-UP HIGH P2.6 ACTIVE LOW
MOV.B #000h,&P2DIR ;P2.0=data, p2.1p2.7 +p1.7 address
CLR.B &P2SEL ;PORT 2 ALL DIGITAL I/O
MOV.B #0FFh,&P2REN ;EN UP/DOWN R all
MOV.B #001h,&P2IES ;SELECT P2.0 HI->LO EDGE INTERRUPT
CLR.B &P2IFG ;CLEAR INT FLAGS
MOV.B #001h,&P2IE ;ENABLE P2.4 INT FOR DATA
//ADC-10 CONFIGULATION
BIC.W #ENC,&ADC10CTL0
MOV.W #0x0018,&ADC10CTL0
MOV.W #0x0000,&ADC10CTL1 ;repeat single channel
MOV.B #0x01,&ADC10AE0 ;enable A0
MOV.B #0x00,&ADC10DTC0
MOV.B #0x00,&ADC10DTC1 ;4 per block
MOV.W #0x0240,&ADC10SA ;start address
BIS.B #0x08,&P1OUT ;power off OP p1.3 active low
//END OF ADC-10 CONFIGULATION
// TEST SEG
// MOV #WDTPW+WDTCNTCL,&WDTCTL ; watchdog timer
MOV #WDTPW+WDTCNTCL+WDTSSEL,&WDTCTL ; watchdog timer 2014/12/03
//11/28 BIS.B #WDTIE,&IE1
// MOV #WDTPW+WDTHOLD,&WDTCTL
// BIC.B #WDTIE,&IE1
BIS #GIE,SR
MOV #100,R14
// END OF TEST SEG
// CHECK TO SEE WHETHER POWER-ON
MOV.W #0200h,R5
MOV.W #0128,R6
MOV.B #010,&FLASH
// CMP.B #055h,&WARM1
// JEQ W2
JMP LSOP
W2: CMP.B #0AAh,&WARM2
JEQ W3
JMP LSOP
W3: CMP.B #055h,&WARM3
JEQ W4
JMP LSOP
W4: CMP.B #0AAh,&WARM4
JEQ GETAD
LSOP: CLR.B 0(R5) ;CLEAR VARIABLE
INC R5
DEC R6
JNZ LSOP
MOV.B #055h,&WARM1
MOV.B #0AAh,&WARM2
MOV.B #055h,&WARM3
MOV.B #0AAh,&WARM4
MOV.B #010,&FLASH
CLR.B &TSTCNT ;test cnt 5~=5 sec
CLR.B &ALMCNT ;cnt to 3 alarm
MOV.B #150,&TMCNT ;INITIAL TIMER COUNTER **************
MOV.W #200,&CNT4
MOV.W #500,&LOWEST
// mov.w #4416,&STDBASE ;69 * 64 = 4416
// mov.w #4992,&STDBASE ;78 * 64 = 4992 2016/01/05
mov.w #7488,&STDBASE ;117 * 64 = 7488 2026/03/10 (78*1.5)
clr.w &BIGCNT
MOV.B #100,&WDCNT
MOV.B #5,&FCNT1
; check Lowest parameter
mov.w #01040h,R5
cmp #0xFFFF,0(R5)
jne Irestr
jmp Inxt
Irestr: mov.b 0(R5),&LOWEST
mov.b 1(R5),&LOWEST1
mov.b #0x77,&FEWRT
mov.b #77,&NorFlag ;2025/11/27
clr.w &BIGCNT
mov.w &LOWEST,&FaulVal
rra.w &FaulVal
MOV #WDTPW+WDTCNTCL+WDTSSEL,&WDTCTL ; watchdog timer 2015/11/28
call #DIVID2
call #MULTADJ
;
Inxt: clr &INDEX
mov #LOGTBL,R10
;*********************************
; mov #780,&ALRMW ;set alarm level value here !!! old=600
; mov #600,&ALRMW ;set alarm level value here !!! old=600
; mov #650,&ALRMW ;set alarm level value here !!! 2015/05/11
; mov #575,&ALRMW ;set alarm level value here !!! 2015/11/29 use adj
; mov #600,&ALRMW ;set alarm level value here !!! 2015/11/29 use adj
; mov #675,&ALRMW ;set alarm level value here !!! 2025/11/25 use adj for FirVal=135
; mov #900,&ALRMW ;set alarm level value here !!! 2025/11/25 use adj for FireVal=180
mov #1350,&ALRMW ;set alarm level value here !!! 2025/11/25 use adj for FireVal=270
;
GETAD: MOV.B &P1IN,PORT1IN ;GET ADDRESS
MOV.B &P2IN,PORT2IN ;GET ADDRESS
INV.B &PORT1IN
INV.B &PORT2IN
CLR.B &EADDR ;P1.1-P1.7 DEVICE ADDRESS
BIT.B #80h,&PORT1IN ;P1.7= ADDR.0
JZ GAD1
BIS.B #01h,&EADDR
GAD1: BIT.B #02h,&PORT2IN ;P2.1=ADDR.1
JZ GAD2
BIS.B #02h,&EADDR
GAD2: BIT.B #04h,&PORT2IN ;P2.2=ADDR.2
JZ GAD3
BIS.B #04h,&EADDR
GAD3: BIT.B #08h,&PORT2IN ;P2.3=ADDR.3
JZ GAD4
BIS.B #08h,&EADDR
GAD4: BIT.B #10h,&PORT2IN ;P2.4=ADDR.4
JZ GAD5
BIS.B #10h,&EADDR
GAD5: BIT.B #20h,&PORT2IN ;P2.5=ADDR.5
JZ GAD6
BIS.B #20h,&EADDR
GAD6: BIT.B #40h,&PORT2IN ;P2.6=ADDR.6
JZ GAD7
BIS.B #40h,&EADDR
GAD7: BIT.B #80h,&PORT2IN ;P2.7=ADDR.7
JZ GAD8
BIS.B #80h,&EADDR
GAD8: AND.B #07Fh,&EADDR;
//JNZ AD0
FNRM: //BIC.B #40h,&P1OUT ;LIT OFF GREEN LED p1.6GREEN P1.4RED
AD0: CLR.B &PARITY
BIT.B #01h,&EADDR
JZ AD1
XOR.B #01h,&PARITY
AD1: BIT.B #02h,&EADDR
JZ AD2
XOR.B #01h,&PARITY
AD2: BIT.B #04h,&EADDR
JZ AD3
XOR.B #01h,&PARITY
AD3: BIT.B #08h,&EADDR
JZ AD4
XOR.B #01h,&PARITY
AD4: BIT.B #10h,&EADDR
JZ AD5
XOR.B #01h,&PARITY
AD5: BIT.B #20h,&EADDR
JZ AD6
XOR.B #01h,&PARITY
AD6: BIT.B #40h,&EADDR
JZ AD7
XOR.B #01h,&PARITY
AD7: BIT.B #01h,&PARITY
JZ W5
AD8: BIS.B #080h,&EADDR ;PUT ON PARITY BIT MAKE EVEN PARITY
/*
AD7: BIT.B #80h,&EADDR
JZ AD8
XOR.B #01h,&PARITY
AD8: CLR.B ADDRL
RRC.B EADDR
RRC.B ADDRL
AND.B #7Fh,&EADDR
BIT.B #01h,&PARITY
JZ W5
AD9: BIS.B #080h,&EADDR ;PUT ON PARITY BIT MAKE EVEN PARITY
*/
W5: MOV.B &EADDR,&ADDR ;MOV EADDR TO ADDR
TST.B &ADDR
// JZ LOOP
EVEN
LAOP: NOP
BIT.B #F_MAT,&CFLAG
jnz LOOP
CMP.B #02,&TSTCNT
jl LOOP
clr.b &TSTCNT
bic.w #ENC,&ADC10CTL0
// nop
//test AD10
//StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupADC10 mov.w #CONSEQ_2+INCH_0,&ADC10CTL1 ; Repeat single channel, A0
mov.w #ADC10SHT_2+MSC+ADC10ON+ADC10IE,&ADC10CTL0 ;
bis.b #01h,&ADC10AE0 ; P1.0 ADC option select
mov.b #004h,&ADC10DTC1 ; 32 conversions
//
Mainloop bis.b #04h,&P1OUT ;IR LED off
//
MOV #WDTPW+WDTCNTCL+WDTSSEL,&WDTCTL ; watchdog timer ;2014/12/03
bic.w #ENC,&ADC10CTL0 ;
busy_test bit #BUSY,&ADC10CTL1 ; ADC10 core inactive?
jnz busy_test ;
mov.w #0240h,&ADC10SA ; dark Data buffer start
// bis.b #010h,&P1OUT ; P1.4 = 1
bis.w #ENC+ADC10SC,&ADC10CTL0 ; Sampling and conversion start
mov.b #77,&ADCFLAG
dlop: nop
TST.B &ADCFLAG
jnz dlop
// bis.w #CPUOFF+GIE,SR ; LPM0, ADC10_ISR will force exit
bic.w #ENC,&ADC10CTL0 ;
bic.b #04h,&P1OUT ;IR LED ON
mov #500,R7
// MOV #WDTPW+WDTCNTCL,&WDTCTL ;WAKE WATCHDOG
MOV #WDTPW+WDTCNTCL+WDTSSEL,&WDTCTL ; watchdog timer 2014/12/03
delaylp dec R7
jnz delaylp
// MOV #WDTPW+WDTCNTCL,&WDTCTL ;WAKE WATCHDOG
MOV #WDTPW+WDTCNTCL+WDTSSEL,&WDTCTL ; watchdog timer 2014/12/03
EVEN
busy_t bit #BUSY,&ADC10CTL1 ; ADC10 core inactive?
jnz busy_t ;
mov.w #0248h,&ADC10SA ; Light Data buffer start
bis.w #ENC+ADC10SC,&ADC10CTL0 ; Sampling and conversion start
mov.b #77,&ADCFLAG
slop: nop
TST.B &ADCFLAG
jnz slop
// bis.w #CPUOFF+GIE,SR ; LPM0, ADC10_ISR will force exit
bis.b #04h,&P1OUT ; P1.3 = 0 IR LED OFF
bis.b #08h,&P1OUT ;OP Power off
mov.w &SMKD1,R5
add.w &SMKD2,R5
add.w &SMKD3,R5
add.w &SMKD4,R5
rra.w R5 ;divide by 2
rra.w R5 ;divide by 4
mov.w R5,&SMKR1
mov.w &SMKL1,R5
add.w &SMKL2,R5
add.w &SMKL3,R5
add.w &SMKL4,R5
rra.w R5
rra.w R5
mov.w R5,&SMKR2
mov.w R5,&SMKR3
sub.w &SMKR1,&SMKR3
mov.w &SMKR3,&SMKRAW
tst.b &NorFlag ;2025/11/29
jz nortst ;not initialized
cmp.w &LOWEST,&SMKR3
jl adjnxt
JEQ adjnx2
clr &LowCnt
inc.w &BIGCNT
cmp.w #30000,&BIGCNT ;2015/11/29 300 => 30000 sec.
jl adjnx2
clr.w &BIGCNT
// inc.w &LOWEST
jmp adjnx1
J2init: NOP
JMP init
;
adjnxt: inc &LowCnt
cmp #1000,&LowCnt
jl adjnx0
// sub #1,&LOWEST
clr &LowCnt
/*
cmp.b #0x77,&FEWRT
jeq adjnx0
mov.w #WDTPW+WDTHOLD,&WDTCTL ;stop watch dog
call #WrtLow
mov.b #0x77,&FEWRT
*/
adjnx0: clr.w &BIGCNT
adjnx1: MOV #WDTPW+WDTCNTCL+WDTSSEL,&WDTCTL ; watchdog timer 2015/11/28
call #DIVID2
adjnx2: call #MULTADJ
// cmp #40,&SMKRAW ;if less than 40 means smoke charmber dirty
// cmp &FaulVal,&SMKRAW ;if less than 1/2 original means smoke charmber dirty
// jge nornxtb
// bic.b #01h,&XMTIN ; set fault flag 20250207 bis->bic force to no charmber dirty
// jmp nornxt
//nornxtb bic.b #01h,&XMTIN ; clear fault flag
nornxt bit.b #10h,&RLYCNT ;test for gain change
jz nortst ;if not alarm goto nortst
// mov.b #03,&TSTCNT ;next second test again
// mov.w R5,&SMKR3
mov.w &SMKR3,R5
rra.w R5
rra.w R5 ;divid 4 =25%
rra.w R5 ;divid 8 =12.5 % 2015/11/29 setted
add.w R5,&SMKR3 ;plus 12.5%
nortst mov &SMKR3,0(R10)
incd R10
inc INDEX
cmp #6,&INDEX
jne LP_NORB
// mov.b #77,&NorFlag
mov #LOGTBL,R6
mov 10(R6),12(R6)
mov #5,R7
mvlp mov 2(R6),0(R6)
incd R6
dec R7
jnz mvlp
dec &INDEX
cmp.b #0x77,&FEWRT
jeq pronxt
mov.w #WDTPW+WDTHOLD,&WDTCTL ;stop watch dog
call #WrtLow
mov.b #0x77,&FEWRT
mov.b #77,&NorFlag
mov.w &LOWEST,&FaulVal
rra.w &FaulVal
pronxt mov #LOGTBL+10,R10 ;reset table index
mov #LOGTBL+10,R9
mov @R9,&WORKW ;the last one
add -2(R9),&WORKW ;new
add -4(R9),&WORKW
add -6(R9),&WORKW ;old
add -8(R9),&WORKW ;5 samples sum
jc nortst0
cmp &ALRMW,&WORKW ;test sum 5 samples
jl nortst2 ;ignor #128
nortst0 add.b #1,&ALMCNT
jmp nortst3 ;rise rate high
;nortst2 cmp #180,&SMKR3 ;0x80 old=130 2014/11/10
;nortst2 cmp #130,&SMKR3 ;0x80 old=130 2014/12/03
;nortst2 cmp #115,&SMKR3 ;0x80 old=130 2015/11/29 use adj
; &ALRMW = #120 * 5 = 600 &FireVal
;nortst2 cmp #120,&SMKR3 ;0x80 old=130 2016/01/05 use adj newchamber
nortst2 cmp #270,&SMKR3 ;0x80 old=130 2025/11/25 use adj newchamber
jl LP_NORB ;
// mov.b #03,&TSTCNT ;next second test again
// add.b #1,&ALMCNT
add.b #2,&ALMCNT ;2014/12/04
nortst3 bis.b #10h,&RLYCNT ;for gain + 12.5%
add.b #1,&ALMCNT
bic.b #08h,&P1OUT ;op power on low active
mov.b #1,&TSTCNT ;shorten sampling time
cmp.b #6,&ALMCNT //count 3 to alarm old=4
jl LOOP
mov.b #99,&ActFlag //set for inhibit ADJ
bis.b #02h,&XMTIN //set fire flag
bis.b #02h,&RLYCNT
bis.b #10h,P1OUT //lit red led
CLR.B &FLASH
// inc.b &ALMCNT
cmp.b #12,&ALMCNT //6->8 2025/11/26
jl LOOP
mov.b #12,&ALMCNT //6->8 2025/11/26
jmp LOOP
//end of test AD10
//J2init: NOP
// JMP init
LP_NORB:
// bit.b #040h,&P1IN //test test reed switch
// jnz LP_NORBB
// add.b #6,&ALMCNT //if zero=contact emulate alarm
// jmp nortst3
LP_NORBB: tst.b &ALMCNT
jz LP_OK
dec.b &ALMCNT
jnz LOOP
LP_OK: EVEN
clr.b &ActFlag //clear ActFlag
bic.b #02h,&XMTIN //reset fire flag
bic.b #10h,P1OUT // off red led
bic.b #12h,&RLYCNT ;
// clr.b &TSTCNT
// mov.b #10,&SENTM
// mov.b #10,&SENCNT
EVEN
LOOP: CMP.B #17,&BITCNT ;#18
JL LP_NORM
CLR.B &BITCNT
EVEN
LP_NORM: BIT.B #F_IN,&DFLAG
JNZ LPIN
DEC.B &WDCNT
JNZ LPWDT
// MOV #WDTPW+WDTCNTCL,&WDTCTL ;WAKE WATCHDOG
MOV #WDTPW+WDTCNTCL+WDTSSEL,&WDTCTL ; watchdog timer 2014/12/03
MOV.B #20,&WDCNT ;old 100 2014/11/10
JMP GETAD
EVEN
LPWDT: // TST.B &ADDRL
// JNZ LPNN
TST.B &ADDR ;IF ADDR == 0
JZ DIOS ;OUTPUT FIRE STATUS
EVEN
LPNN: MOV.B DO1,&WKR2
AND.B DO2,&WKR2
AND.B DO3,&WKR2
; BIS.B DO4,&WKR2
; BIS.B DO5,&WKR2
BIT.B #040h,&WKR2
JNZ CHKIN
EVEN
CHK5: BIT.B #020h,&WKR2
JNZ LAOP ;low active
BIT.B #001h,&RLYON
JNZ CLRDO
JMP LAOP
EVEN
CHK5ON: BIC.B #040h,&P1OUT ;set relay on
BIS.B #01h,&RLYON
JMP LAOP ;LOOP BACK IF BIT5 SETTED
EVEN
CK5OFF: BIS.B #040h,&P1OUT ;Reset relay off
EVEN
CLRDO: CLR.B &RLYON ;CLEAR FLAGS
JMP LAOP
EVEN
DIOS:
JNZ DOUT ;FIREED
FOUT:
EVEN
DOUT:
JMP LAOP
//J2init: NOP
// JMP init
EVEN
CHKIN: BIT.B #002h,&XMTIN ;FIRE BIT 5 = P2.1
JNZ CHKYES
JMP CHK5
EVEN
CHKYES:
EVEN
LPIN: BIC.B #F_IN,&DFLAG
EVEN
CMP.B #14,&LASTHI ;#15
JNE LPNXT
CALL #SWSR
EVEN
LPNXT:
LP1: CMP.B &DO2,&DO1
JEQ LP7C
JMP LP7B
LP7A: CMP.B &DO3,&DO1
JEQ LP7C
JMP LP7B
EVEN
LP7C: BIT.B #020h,&DO1 ;TEST BIT 5 FOR RELAY ON
JNZ SETOUT
JMP RSTOUT
EVEN
SETOUT: BIC.B #040h,&P1OUT ;set relay on P1.6 low active
BIS.B #001h,&RLYON
JMP LP7B
EVEN
RSTOUT: BIT.B #001h,&RLYON
JNZ LP7B
BIS.B #040h,&P1OUT ;Reset relay off p1.6
EVEN
LP7B: CMP.B #08h,&BITCNT ;bitcnt==8 check pooled address
JEQ LP8A
JMP LP8B
LP8A: MOV.B &RCVHI,&CADDR ;CADDR store pooled address
CMP.B &ADDR,&CADDR ;ADDR store parityed device address
JNE LPB
// MOV.B &RCVLO,&CADDR
// AND.B #80h,&CADDR
// CMP.B &ADDRL,&CADDR
// JNE LPB
BIS.B #F_MAT,&CFLAG
BIS.B #F_MAT,&DFLAG
TST.B &FLASH
JZ LPB
BIT.B #03h,&XMTIN ;if alarm or fault disable pooling flash
JNZ LP8M
BIS.B #10h,&P1OUT ;SET P1.4 TO FLASH LINK LEDP1.4=RED
LP8M: CLR.B &FLASH
// TST.B &FLASH
// JZ LPB
// BIS.B #10h,&P1OUT ;SET PB7=P1.6GREEN TO FLASH LINK LEDP1.4=RED
// CLR.B &FLASH
// XOR.B #020h,P2OUT ;TEST ADDRRESS MATCH FLASH LED P2.5
JMP LPB
JJ2init: NOP
jmp J2init
EVEN
LP8B: CMP.B #16,&BITCNT ;#17
JEQ LPA
JMP LPB
EVEN
LPA: INC.B &FRMCNT
// BIS.B #020h,P2OUT ;TEST ADDRRESS MATCH FLASH LED P2.5 $$
CLR.B &BITCNT
BIC.B #F_MAT,&CFLAG
BIC.B #F_SYS,&CFLAG
EVEN
LPB:
BIT.B #F_MAT,&CFLAG
JNZ LPC
//-INV.B &CIN
//-MOV.B &CIN,&XMTIN
JMP LP2
EVEN
LPC: BIT.B #F_MAT,&DFLAG
JNZ LP2
EVEN
CMP.B #013,&BITCNT ;#14
JNE LP14
CALL #CHKDO
JMP LP2
EVEN
LP14: CMP.B #14,&BITCNT ;#15
JNE LP15
CALL #FMTI2
JMP LP2
EVEN
LP15: CMP.B #15,&BITCNT ;#16
JNE LP2
CALL #FMTPI
LP2: EVEN
JMP LAOP
;
;CHKDO USE TO CHECK DO AND FORMAT I1
;
EVEN
CHKDO: BIS.B #F_MAT,&DFLAG
BIC.B #F_PAS,&CFLAG
CLR.B &CCS
MOV.B &RCVHI,&WORK
BIT.B #008h,&WORK ;TEST FIRE BIT 3
JZ CK3
INV.B &CCS
CK3: BIT.B #010h,&WORK ;TEST FAULT BIT 4
JZ CK4
INV.B &CCS
CK4: BIT.B #020h,&WORK ;TEST RELAY BIT 5
JZ CK5
INV.B &CCS
CK5: BIT.B #040h,&WORK ;TEST MANUAL BIT 6
JZ CK6
INV.B &CCS
CK6: BIT.B #080h,&WORK ;TEST PARITY BIT 7
JZ CK7
INV.B &CCS
CK7: TST.B &CCS
JNZ CHKA
INV.B &WORK
AND.B #0F8h,&WORK
MOV.B &DO4,&DO5
MOV.B &DO3,&DO4
MOV.B &DO2,&DO3
MOV.B &DO1,&DO2
MOV.B &WORK,&DO1
BIT.B #008h,&DO1 ;TEST BIT 3 FIRE TEST
JNZ CHK9
JMP CHKA
CHK9: BIS.B #F_POST,&CFLAG
BIS.B #F_PAS,&CFLAG
BIC.B #040h,&XMTIN ;RESET BIT 1 = P2.6
RET
CHKA: BIT.B #F_POST,&CFLAG
JZ CHKA1
RET
CHKA1: BIT.B #002h,&XMTIN ;PB5 = P2.1 FOR FIRE STATUS
JNZ CHKB
RET
CHKB: BIS.B #F_POST,&CFLAG
BIS.B #F_PAS,&CFLAG
AND.B #0EFh,&DO1
//-TST.B &RLY_FLAG ///
//-JZ T1NXT
RET
T1NXT: BIS.B #004h,&P2OUT ;FIRE LED ON PB6=P2.2
RET
;
;FMTI2 FORMAT I2
;
EVEN
FMTI2: BIS.B #F_MAT,&DFLAG
BIT.B #010h,&DO1
JNZ FMT9
JMP FMTA
FMT9: BIS.B #F_POST,&CFLAG
BIT.B #F_PAS,&CFLAG
JNZ FM1
JMP FM2
FM1: BIC.B #F_PAS,&CFLAG
JMP FMTA
FM2: BIS.B #F_PAS,&CFLAG
FMTA: BIT.B #F_POST,&CFLAG
JZ FMTA1
RET
EVEN
FMTA1: BIT.B #001h,&XMTIN ;PB0 = P2.0 FOR FAULT STATUS
JNZ FM5
BIT.B #002h,&XMTIN ;TEST P2.1 FIRE
JZ FM7
RET
FM7: TST.B &RLY_FLAG
JNZ FM7A
// BIC.B #004h,&P2OUT ;CLERA PB6=P2.2 LED
EVEN
FM7A: RET
EVEN
FM5: BIS.B #F_POST,&CFLAG
TST.B &RLY_FLAG
JNZ FM6
TST.B &FAULT
JZ FM6
// XOR.B #004h,&P2OUT ;TOGGLE LED FOR FAULT
CLR.B &FAULT
FM6: BIT.B #F_PAS,&CFLAG
JZ FM4
FM3: BIC.B #F_PAS,&CFLAG
RET
FM4: BIS.B #F_PAS,&CFLAG
RET
;
;FMTPI FORMAT IP INPUT PARITY
;
EVEN
FMTPI: BIS.B #F_MAT,&DFLAG
BIT.B #F_PAS,&CFLAG
JZ FMTPI1
RET
FMTPI1: BIS.B #F_POST,&CFLAG
RET
;
;Write_Lowest ;use to write LOWEST Value to SegmentC #01040h
;
WrtLow: nop
mov #LOGTBL,R6
mov 0(R6),&WORKD
add 2(R6),&WORKD
add 4(R6),&WORKD
add 6(R6),&WORKD
rra &WORKD
rra &WORKD
mov &WORKD,&LOWEST
mov.w #01040h,R5
mov.w #FWKEY+FSSEL0+FN1,&FCTL2
mov.w #FWKEY,&FCTL3
mov.w #FWKEY+ERASE,&FCTL1
mov.w #0,&01040h
Prog_segC
mov.w #FWKEY+WRT,&FCTL1
mov.w #FWKEY,&FCTL3
mov.w &LOWEST,0(R5)
// mov.b &LOWEST,0(R5)
// mov.b &LOWEST1,1(R5)
mov.w #FWKEY+LOCK,&FCTL3
ret
;
;P1ISR P1.0 CLOCK SIGNAL INTERRPT SERVICE ROUTINE
;
EVEN
P1ISR: BIC.B #020h,&P1IFG ;CLEAR INT FLAG P1.5 CLK
// XOR.B #020h,P2OUT ;TEST ADDRRESS MATCH FLASH LED P2.5
BIT.B #020h,&P1IES ; 1= H2L 0= L2H
JZ CLKL2H
CLKH2L: BIC.B #020h,&P1IES ;CHANGE TO L2H *****
BIT.B #F_POST,&CFLAG
JZ CLKH3
BIC.B #02h,&P1OUT ;P1.1 = PB1 DATA LOW ACTIVE
CLKH3: BIC.B #F_BIT,&CFLAG
// BIC #LPM3,0(SP)
RETI
;
;CLKL2H CLOCK P1.0 = PB4 Lo>Hi
;
EVEN
CLKL2H: BIS.B #002h,&P1OUT ;P1.1 = PB1 RESET DATA OUTPUT
// TST.B &RLY_FLAG
// JNZ T3NXT
BIT.B #03h,&XMTIN
JNZ T3NXT ;if fire or fault don't clear red led
BIC.B #010h,&P1OUT ;RESET P1.6=GREEN FLASH P1.4=RED
T3NXT: BIS.B #020h,&P1IES ;SET EDGE H2L *****
BIS.B #F_IN,&DFLAG
CLRC
BIT.B #F_IN,&CFLAG
JZ CLKL4
INC.B &HICNT
SETC
CLKL4: RRC.B &RCVHI ;ROTATE DATA BIT INTO RCV BUFFER
RRC.B &RCVLO ;DITTO
INC.B &BITCNT ;ONE BIT END
BIS.B #F_IN,&CFLAG ;DATA NORMAL HIGH
BIS.B #F_BIT,&CFLAG ;ONE BIT COMPLETED
BIC.B #F_POST,&CFLAG
BIC.B #F_MAT,&DFLAG
// BIC #LPM3,0(SP)
RETI
;
;DATH2L FOR DATA Hi>Lo P2.4 = PB2
;
EVEN
P2ISR: BIC.B #F_IN,&CFLAG
MOV.B &HICNT,&LASTHI
CLR.B &HICNT
BIC.B #001h,&P2IFG ;P2.0 DATA
// XOR.B #020h,P2OUT ;TEST ADDRRESS MATCH FLASH LED P2.5
// BIC #LPM3,0(SP)
P2END: RETI
;
;SYNC DATA CHECKING
;
EVEN
SWSR: CMP.B #07Fh,&RCVHI
JEQ SW1
RET
SW1: CMP.B #0FEh,&RCVLO ;14 bits high
JEQ SW2
RET
SW2: CLR.B &FRMCNT
CLR.B &BITCNT
CLR.B &LASTHI
CLR.B &HICNT
CLR.B &RCVHI
CLR.B &RCVLO
// XOR.B #020h,P2OUT ;TEST ADDRRESS MATCH FLASH LED P2.5
RET
EVEN
WDISR: NOP
BIC.B #WDTIFG,&IFG1
JMP JJ2init
RETI
EVEN
TMISR: NOP
BIC #01h,&TACTL ;CLEAR TAIFG
EVEN
CMP #190,&CNT4 //200~160 ON
JGE TMN1 ;LED ON
CMP #150,&CNT4 //160~120 OFF
JGE TMN0 ;Keep LED Off
CMP #140,&CNT4 //120~80 ON
JGE TMN5 ;LED OFF
BIC.B #10h,&P1OUT ;clear LED
JMP TMN2
TMN5: BIT.B #02h,&XMTIN
JZ TMN2
BIS.B #10h,&P1OUT ;Lit LED
JMP TMN2
TMN0: BIC.B #10h,&P1OUT ;Clear LED
JMP TMN2
TMN1: BIT.B #03h,&XMTIN
JZ TMN2
BIS.B #10h,&P1OUT ;Lit LED
EVEN
TMN2: DEC.B &TMCNT
JNZ TMRTN
//TMNOR: DEC.B &TMCNT
// JNZ TMRTN
EVEN
TMZERO: MOV.B #150,&TMCNT
// MOV.B #0Fh,&FLASH
MOV.B #0Fh,&FAULT
// DEC.B &SENCNT
// JNZ TMRTN
// MOV.B &SENTM,&SENCNT
// MOV.B #77h,&SENFLAG
DEC.B &FCNT1
JNZ TMRTNB
MOV.B #0Fh,&FLASH
MOV.B #5,&FCNT1
TMRTNB: INC.B &TSTCNT
cmp.b #1,&TSTCNT
jne TMRTN
bic.b #08h,&P1OUT ;op power on low active
;TEST TIMER
// XOR.B #10h,&P1OUT ;toggle RED LED for testing
EVEN
TMRTN: NOP
DEC &CNT4
JNZ TMRTN2
MOV #200,&CNT4
BIT.B #03h,&XMTIN
JZ TMRTN2
BIS.B #10h,&P1OUT ;Lit LED
TMRTN2: NOP
RETI
//
ADC10U: NOP
CLR.B &ADCFLAG
// BIC #LPM0,0(SP)
RETI
;
;WORKC = WORKA / WORKB
;
EVEN
DIVID2: NOP
TST.B &ActFlag
JZ DIVNXT
RET
EVEN
DIVNXT: CLR &WORKC
MOV &STDBASE,&WORKA
MOV &LOWEST,&WORKB
MOV.B #16,DOCNT16
DOLOOP: CLRC
RLC &WORKA
RLC &WORKC
CMP &WORKB,&WORKC
JGE DLOP1
CLRC
JMP DLOP2
DLOP1: SUB &WORKB,&WORKC
SETC
DLOP2: RLC &WORKD ;Q
DEC.B &DOCNT16
JNZ DOLOOP
MOV.W &WORKD,&ADJ
RET
;
;MULTADJ RMKR3 * ADJ / 64
;
EVEN
MULTADJ: NOP
MOV.W &SMKR3,&WORKA
MOV.W &ADJ,&WORKB
CLR.W &WORKC
CLR.W &WORKD
CLR.W &WORKE
MOV.B &8,&DOCNT16
MLOOP: RRC.W &WORKA
JNC MLOP1
CLRC
ADD.W &WORKB,&WORKD
ADDC.W &WORKC,&WORKE
MLOP1: CLRC
RLC.W &WORKB
RLC.W &WORKC
DEC.B &DOCNT16
JNZ MLOOP
MOV.B #6,&DOCNT16
MD64: CLRC
RRC.W &WORKE
RRC.W &WORKD
DEC.B &DOCNT16
JNZ MD64
AND.W #07FFh,&WORKD ;2025/11/27
MOV.W &WORKD,&SMKR3
RET
//
//Vectors
//
ORG 0FFE0h
DC16 init ; set reset vector to 'init' label
DC16 init ; E2 set reset vector to 'init' label
ORG 0FFE4h
DC16 P1ISR ;PORT 1 ISR
ORG 0FFE6h
DC16 P2ISR ;PORT 2 ISR
DC16 init ;E8
DC16 ADC10U ;EA
DC16 init ;EC
DC16 init ;EE
ORG 0FFF0h
DC16 TMISR ;F0 TIMER 2
DC16 init ;F2 TIMER 2
ORG 0FFF4h
DC16 WDISR ;WATCH DOG ISR
DC16 init ;F6 COMP A+
DC16 init ;F8
DC16 init ;FA
DC16 init ;FC NMI
ORG 0FFFEh
DC16 init ; set reset vector to 'init' label
END
Dear All:
Main.asm and ***.s43 are same.
INPUT PORT interupt response time are different, whitch make the IAR *.D43 works correctly, and CCS ***.out not function correctly.
Could comeone tell me how to improve the INPUT PORT interrupt response time ?
Thanks a lot to all friends !
Best regards;
Marshall Wu 2026/03/20
Hello Marshall,
In fact, the CPU response speed to interrupt is decided by hardware. I don't think it will be different when the two project files have the same hardware configuration (such as main frequency). Otherwise, the response speed you mean is the time from interrupt trigger signal occurs to the interrupt handling action occurs, if so, maybe the different compiler has different compile action to the same one assembly file.
You can try to generate a very simply project, just keep the interrupt handler code, and in the handler, directly toggle one GPIO. and test whether the GPIO toggle has different speed when in CCS and IAR. The easier project, will be more helpful, if we need software engineer to look into this issue,
best Regards,
Janz Bai