TMS570LS3137: Flash image corrupts upon enabling the ECC

Part Number: TMS570LS3137
Other Parts Discussed in Thread: NOWECC,

Hello,

We use a TMS570LS3137 processor with CCS version 10.1.1 and the TI ARM 20.2.4 LTS compiler. We have enabled both Flash and RAM ECC using a dual-method setup. The ECC for the primary Flash and RAM areas is generated directly via the linker command file, excluding the CRC placeholder region. The ECC for this specific CRC region is calculated and appended post-build using the nowECC utility.

Although the resulting binary image flashes successfully, a critical failure occurs when executing the system assembly instruction that enables the Flash ECC inside the CPU (MCR P15, #0x00, R0, C1, C0, #0x01). Upon execution, the Flash memory contents appear corrupted in the debugger view, and the subsequent runtime Flash CRC verification fails. This behaviour manifests exclusively when the total size of the initialized data sections (.data) exceeds 0x4000 bytes.

To mitigate this, we have verified that all unused memory spaces are padded via vfill=0xFFFFFFFF, the application image boundaries are strictly aligned to 8-byte margins, Auto-ECC generation is turned off in the CCS Flash settings, and there are no overlapping memory segments

Need your support to resolve the issue.

 

Thanks,

Sundaram

  • Hello TI team,

    Can you please provide your inputs.

    -Sundaram

  • Hi Sundaram,

    Apologies for the delayed response!

    According to your behavior definitely some single bit error corrections are happening, due mismatch between data and corresponding ECC.

    One thing i don't understand here is that where ECC corruptions are happening? You are mentioning them in flash and at the same time the .data section is stored in RAM.

    The ECC for the primary Flash and RAM areas is generated directly via the linker command file,

    Are you also generating ECC for RAM using linker command file? How are you doing that? Could you please explain more details about it?

    --
    Thanks & regards,
    Jagadish.

  • As per our linker script, .data is loaded in flash and run from RAM using the following command.

      .data : LOAD = PROG,
       RUN = RAM,

    The data is copied from flash to RAM boot sequence. 

    Only the ECC for the primary Flash is generated directly via the linker command file.

    You mentioned some single bit error corrections are happening, due mismatch between data and corresponding ECC. How to identify the exact location/cause for this mismatch. Also, please note we observe this behavior only when the size .data section goes above 0x4000. 

    Thanks,

    Sundaram

  • Could you please provide response. It has been 3 weeks since the issue is raised. We need your immediate support.

    Thanks,

    Sundaram

  • Hi Sundaram,

    Apologies for the delayed response! I was stuck with other issues in mean time.

    We have one internal AI which can analyze all our old data base issues and can provide suitable suggestions. I got some valuable suggestions from it for this thread. Could you please refer them once:

    The problem appears to be related to a memory layout conflict that occurs specifically when:

    • Initialized data sections (.data) exceed 0x4000 bytes (16KB)
    • Flash ECC is enabled via the MCR P15 instruction
    • Using dual ECC generation method (linker + nowECC utility)

    Potential Root Causes & Solutions

    1. Memory Alignment and ECC Boundary Issues

    The 0x4000 byte threshold suggests this might be related to ECC block boundaries or Flash sector alignment:

    Solution:

    • Ensure your .data sections are aligned to ECC block boundaries (typically 64-bit or 128-bit aligned)
    • Check if the linker script places .data sections across ECC block boundaries when exceeding 0x4000 bytes
    • Verify that the CRC placeholder region doesn't overlap with ECC-protected areas

    2. Linker Script Memory Layout

    Recommended Actions:

    • Review your linker command file to ensure proper memory region definitions
    • Verify that Flash and RAM regions don't have overlapping ECC generation
    • Consider splitting large .data sections across multiple memory regions

    3. ECC Generation Timing

    The dual ECC method might be causing conflicts:

    Solution:

    • Try generating all ECC post-build using only the nowECC utility (disable linker ECC generation entirely)
    • Alternatively, use only linker-based ECC generation and avoid the nowECC utility
    • Ensure the nowECC utility processes the entire Flash image, not just the CRC region

    4. CCS Flash Settings Verification

    Double-check these CCS settings:

    • Verify Auto-ECC is completely disabled in Flash settings
    • Ensure Flash algorithm matches your processor variant
    • Check that Flash memory ranges in CCS match your linker script exactly

    5. Debugging Steps

    1. Memory Dump Analysis: Before enabling Flash ECC, dump the Flash contents and verify ECC data integrity
    2. Incremental Testing: Gradually increase .data size to pinpoint the exact threshold where corruption occurs
    3. ECC Verification: Use the TMS570 built-in ECC test modes to verify ECC data integrity before runtime

    6. TI-Specific Considerations

    For TMS570LS3137 specifically:

    • Check TI's technical documentation for known errata related to Flash ECC
    • Verify you're using the correct Flash wait states for your operating frequency
    • Ensure proper Flash power-up sequence before enabling ECC

    Immediate Workaround

    As a temporary solution, consider:

    • Reducing initialized data size below 0x4000 bytes by moving some data to uninitialized sections
    • Using dynamic initialization for large data structures
    • Implementing custom ECC verification routines

    --
    Thanks & regards,
    Jagadish.