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OMAP: CCSv5 enable to read some memory mapped registers

Bruce Samhaber
Prodigy 120 points

Hi,

On an OMAP4  with both CortexA9s, both CortexM3s and the CSSTM connected, the COrtexA9_0 is selected the CLK3_HOST_CLK3 registers are showing error message in teh value column "Error: unable to read" . Whereas the CLK1_HOST_CLK1 and CLK2_HOST_CLK2 registers are visible.

Why would the CLK3_HOST_CLK3 registers not be readable?

What can be done to make them readable?  And similarly for anyother CLK3_* registers.

Thank you,

Bruce.

  • 0
    TI__Guru**** 171519 points

    Bruce,

    Thanks for reporting this. It is an issue with the GEL file. It sets the memory range of the CLK3_* registers to NONE instead of RAM (check the attached screen).

    To repair that, open the file <omap4430_cortexa9_cpu0_startup.gel> and replace line 79 (shown below):

        GEL_MapAddStr(0x44000000, 0, 0x01000000, "R|W|AS4", 0);  /* L3 configuration registers - 16Mb */

    With the line below:

        GEL_MapAddStr(0x44000000, 0, 0x01800000, "R|W|AS4", 0);  /* L3 configuration registers - 24Mb */

    The file for the other A9 core <omap4430_cortexa9_cpu1_startup.gel> must also be modified.

    I'll try to contact the responsible person that created these files and make him aware of this change, ok?

    Regards,

    Rafael