TMS320F28377D: CCS Debug Error

Yuki Noguchi

Part Number: TMS320F28377D
Other Parts Discussed in Thread: C2000WARE

I am trying to debug a TMS320F28377D target using the XDS100v2.
(CCS Version: 6.1.1.00022)
Sometimes a verification error occurs, or the error below appears; other times, the load completes without any errors, but when I step through the code, a completely different step is executed.

I suspect the program is not loading correctly. Is there a solution?

Error message
C28xx_CPU1: GEL Output:
Memory Map Initialization Complete
C28xx_CPU1: Loader: One or more sections of your program fall into a memory region that is not writable. These regions will not actually be written to the target. Check your linker configuration and/or memory map.

Translated with DeepL.com (free version)

3 days ago

0 Matt Kukucka 2 days ago

TI__Mastermind 20290 points

Hello,

This seems to be a linker cmd file issue. Please audit your memory allocation to ensure that all memory ranges are valid for the F28377D memory map.

Otherwise, CCS v6 is a very old version and no longer supported by TI. Are you able to update to CCS 12.8.1?

Best,

Matt

0 Yuki Noguchi 2 days ago in reply to Matt Kukucka

Prodigy 20 points

Hello,
First of all, thank you for your reply.

Regarding the CCS version update, I’d love to do it, but we have a base project and are unable to change the environment at this time.

If I provide the linker command file, would you be able to analyze it with me?

If possible, I’d prefer to discuss the details via email rather than on E2E.

0 Matt Kukucka 1 day ago in reply to Yuki Noguchi

TI__Mastermind 20290 points

Hello,

I understand the concern with migrating to a different CCS version. If the linker command file / memory allocation looks clean, then there is a possibility that your particular CCS version has bugs causing these issues.

Does the error occur when you use a default example from C2000Ware?

Please compare your linker command file to the data sheet's memory map table (Section 7.3.1 C28x Memory Map). If the memory ranges look correct, this may be a CCS related issue.

Best,
Matt

0 Ki 10 hours ago in reply to Matt Kukucka

TI__Guru**** 482651 points

Matt Kukucka said:
Please compare your linker command file to the data sheet's memory map table (Section 7.3.1 C28x Memory Map). If the memory ranges look correct, this may be a CCS related issue.

In addition to checking the linker command file to the datasheet, also compare it to the debug memory map set in CCS.

In general, there are many potential causes for this data verification error. Please see the below article for more details:

https://dev.ti.com/tirex/explore/node?isTheia=false&node=A__APy2XbLelxyqBB2Yz0WR.w__ccs_devtools__FUz-xrs__LATEST

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TMS320F28377D: CCS Debug Error