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CCS ARM advanced features

B Chavali
Prodigy 255 points


I am using CCSv5 with Cortex R4 device. In ARM advanced features,I have the ability to flush data cache or instruction cache.

What does this function do? When i execute this, i dont see changes to my internal cache memory.

I also see that i cannot execute clean data cache. Are these functions specific to Cortex A or both Cortex A/R?

Thanks.

B Chavali

  • 0
    TI__Guru**** 171309 points

    Hi,

    A cache flush operation writes all its data to the memory and marks it as invalid, therefore forcing the next instruction or data to be fetched directly from the memory. However, it does not particularly writes zeros or something else to the cache memory itself (that would be an operation of invalidate and clean). You would probably see changes in the destination memory (if your algorithm was modifying data) after performing a flush. 

    Since these operations follow the ARM specifications, a good reference to better understand these operations is shown in sections 4.3.21 and 8.5 of the R4's TRM:

    I am not sure why you can't execute the clean data cache, but I imagine this may be restricted depending on other device configurations. The references above indicate this is valid for CortexR cores as well.

    Hope this helps,

    Rafael