OMAP-L138 eXperimenter Kit. C674X_0: File Loader: Data verification failed at address...

Stefano Battista

Other Parts Discussed in Thread: OMAP-L138, TMS320C6748

hi all. I have a problem while testing and audio codec software on OMAP-L138, using Logic PD board OMAP-L138 eXperimenter Kit.

starting from the sample code from Logic PD, I tested the audio in/out functions, and they are ok.

OMAP-L138_TMS320C6748_Files_v2.3.zip\TMS320C6748_GEL_BSL_Files_v2.3\tests\experimenter\audio\

but, as soon as I add the code for the audio codec (AAC), I get in trouble loading the (larger) program for debugging/testing from CCS Version: 4.2.0.10017 (shipped with the EXP Kit). here is a snapshot of the problem, including (1) CCS output (2) Linker CMD file (3) memory map MAP file trimmed

the problem appears as soon as I move the "text" section from "shared_ram" to "external_ram" since the OUT binary file grows from 309 KB to 696 KB.

I would greatly appreciate any help on how to correctly combine the Linker CMD file anf Memory Map, to continue loading & testing the code from CCS.

thanks & regards,

--stefano

(1) CODE COMPOSER STUDIO OUTPUT

Loading program Am4TestDsp.out...

C674X_0: Output: Target Connected.

C674X_0: Output: ---------------------------------------------

C674X_0: Output: Memory Map Cleared.

C674X_0: Output: ---------------------------------------------

C674X_0: Output: Memory Map Setup Complete.

C674X_0: Output: ---------------------------------------------

C674X_0: Output: KICK Unlocked.

C674X_0: Output: ---------------------------------------------

C674X_0: File Loader: Data verification failed at address 0xC0042680 Please verify target memory and memory map.

Error found during data verification.

Ensure the linker command file matches the memory map.

(2) LINKER CMD FILE

-stack 0x00000800

-heap 0x00000800

MEMORY

{

dsp_l2_ram: ORIGIN = 0x11800000 LENGTH = 0x00040000

shared_ram: ORIGIN = 0x80000000 LENGTH = 0x00020000

external_ram: ORIGIN = 0xC0000000 LENGTH = 0x08000000

arm_local_ram: ORIGIN = 0xFFFF0000 LENGTH = 0x00002000

}

SECTIONS

{

.far > external_ram

.text > external_ram

.stack > shared_ram

.bss > shared_ram

.data > shared_ram

.const > shared_ram

.switch > shared_ram

.sysmem > shared_ram

.cinit > shared_ram

.cio > shared_ram

}

(3) MEMORY MAP

MEMORY CONFIGURATION

name origin length used unused attr fill

---------------------- -------- --------- -------- -------- ---- --------

dsp_l2_ram 11800000 00040000 00000000 00040000 RWIX

shared_ram 80000000 00020000 00009c6f 00016391 RWIX

external_ram c0000000 08000000 00062808 07f9d7f8 RWIX

arm_local_ram ffff0000 00002000 00000000 00002000 RWIX

SECTION ALLOCATION MAP

output attributes/

section page origin length input sections

-------- ---- ---------- ---------- ----------------

.data 0 80000000 00000000 UNINITIALIZED

.cinit 0 80000000 0000824c

.stack 0 80008250 00000800 UNINITIALIZED

.sysmem 0 80008a50 00000800 UNINITIALIZED

.const 0 80009250 00000717

.bss 0 80009968 00000170 UNINITIALIZED

.cio 0 80009ad8 00000120 UNINITIALIZED

.switch 0 80009bf8 0000007c

.far 0 c0000000 00042668 UNINITIALIZED

.text 0 c0042680 000201a0

over 13 years ago

0 Ki over 13 years ago

TI__Guru**** 451431 points

Hello,

Can you confirm that DDR has been initialized before you tried to load the program? The routine to do it should be in the GEL files for the L138 provided by LogicPD and GEL output should come to the console when it it happens.

Thanks

0 Stefano Battista over 13 years ago in reply to Ki

Prodigy 50 points

Ki--

thanks for your feedback.

please note that, included in the LogicPD code samples, there are both version to work through ARM and through DSP.

I am using the latter version, procuding output like "C674X_0: Output:" from the GEL file.

as far as I understand, the output from the GEL file execution is already there:

procudes

C674X_0: Output: Target Connected.

C674X_0: Output: ---------------------------------------------

C674X_0: Output: Memory Map Cleared.

C674X_0: Output: ---------------------------------------------

C674X_0: Output: Memory Map Setup Complete.

C674X_0: Output: ---------------------------------------------

C674X_0: Output: KICK Unlocked.

C674X_0: Output: ---------------------------------------------

the Setup_Memory_Map() should do the DDR initialization, with code like this:

GEL_MapAddStr( 0xC0000000, 0, 0x08000000, "R|W|AS4", 0 ); // DDR Data

am I missing something?

thanks,

--stefano

0 Ki over 13 years ago in reply to Stefano Battista

TI__Guru**** 451431 points

Stefano Battista said:

the Setup_Memory_Map() should do the DDR initialization, with code like this:

GEL_MapAddStr( 0xC0000000, 0, 0x08000000, "R|W|AS4", 0 ); // DDR Data

No. All that does is set the debugger memory map (tells CCS that there is DDR at that address). It doesn't actually do any initialization or even validate if there is any real accessible memory there.

What you are missing is:

C674X_0: Output:    Target Connected.
C674X_0: Output:    ---------------------------------------------
C674X_0: Output:    Memory Map Cleared.
C674X_0: Output:    ---------------------------------------------
C674X_0: Output:    Memory Map Setup Complete.
C674X_0: Output:    ---------------------------------------------
C674X_0: Output:    KICK Unlocked.
C674X_0: Output:    ---------------------------------------------
C674X_0: Output:    PLL0 init done for Core:300MHz, EMIFA:25MHz
C674X_0: Output:    mDDR initialization is in progress....
C674X_0: Output:    PLL1 init done for DDR:150MHz
C674X_0: Output:    Using mDDR settings
C674X_0: Output:    mDDR init for 150 MHz is done
C674X_0: Output:    ---------------------------------------------

You need to run the GEL routine to initialize DDR:

NOTE that if you just connect to the ARM first, it will automatically run this routine so you don't have to manually do it.

Thanks

0 Stefano Battista over 13 years ago in reply to Ki

Prodigy 50 points

dear Ki--

brilliant, that was exactly the solution.

I just called the same GEL function in the OnTargetConnectCode:

OnTargetConnect( )
{
    GEL_TextOut("\tTarget Connected.\n","Output",1,1,1);
    GEL_TextOut("\t---------------------------------------------\n","Output",1,1,1);
    Clear_Memory_Map();
    Setup_Memory_Map();

    DEVICE_kickUnlock(); // No longer needed for Si Rev 2.0+

    // SB 1203 >>>>
    PSC_All_On_Experimenter();
    Core_300MHz_mDDR_150MHz();
    Wake_DSP();
   // SB 1203 <<<<
}

resulting in correct initialization of the DDR:

C674X_0: Output:    Target Connected.
C674X_0: Output:    ---------------------------------------------
C674X_0: Output:    Memory Map Cleared.
C674X_0: Output:    ---------------------------------------------
C674X_0: Output:    Memory Map Setup Complete.
C674X_0: Output:    ---------------------------------------------
C674X_0: Output:    KICK Unlocked.
C674X_0: Output:    ---------------------------------------------
C674X_0: Output:    PSC Enable Complete.
C674X_0: Output:    ---------------------------------------------
C674X_0: Output:    PLL0 init done for Core:300MHz, EMIFA:25MHz
C674X_0: Output:    mDDR initialization is in progress....
C674X_0: Output:    PLL1 init done for DDR:150MHz
C674X_0: Output:    Using mDDR settings
C674X_0: Output:    mDDR init for 150 MHz is done
C674X_0: Output:    ---------------------------------------------
C674X_0: Output:    DSP Wake Complete.
C674X_0: Output:    ---------------------------------------------

thanks for the efficient support,

--stefano

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