This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Simulator's cache configuration

Hello,

I'm writing a program for the c6678 multiprocessor just using the standard library provided by the compiler; I'm not using RTSC, SYS/BIOS, and the like. I want to specify a cache configuration during device startup, and I think GEL files are intended for that purpose. Currently I'm targeting the c6678 simulator. Cycle approximate and functional simulators differ in this matter, functional simulator being configured with cache enabled. I cannot find any GEL documentation that could help.

Thank you very much.

  • Juan,

    When using the C6678 hardware you can configure the cache via GEL.  If you take a look at the Set_DSP_Cache function in the evmc6678l.gel file that is located in /ccsv5/ccs_base/emulation/boards/evmc6678l/gel you can see how this is done.  Not sure if this will work on the simulator.  I will flag it for the sim team to comment.

    Have you taken a look at the chip support library. http://processors.wiki.ti.com/index.php/Chip_support_library  Ultimately you are going to want to do your setup in your code as GEL will not be present when you deploy your product.  

    John

  • Thank you for our reply.

    When I create a target configuration file for the 6678 functional simulator all the cores are set to use this gel file ../../simulation_csp_ny/env/ccs/import/tisim_init_c6678.gel located under /opt/ti/ccsv5/something.../. I have looked at that file and I saw nothing related to cache configuration. So I'm going to take a look at the file you pointed me to. The funny thing is cycle approximate simulator gives me no problem, while functional simulator does, although their gel file's contents are the same.

    Yes, I know about CSL. I can configure data cache to be zero bytes in size and use it in raw mode, I tried that and it worked. But I do not know what to do about program cache; I want to load some code to L1P. I thought cache configuration is done by the bootloader.

    Thank you very much.

  • Here are some more details about this issue. As far as I know the cache configuration for each simulator is located in a separate .cfg file. If I modify the .cfg file the cycle approximate simulator uses, everything goes fine and the desired cache configuration is set up. That's not the case when the functional simulator is used; in Linux seems that that file is kind of ignored (although the default configuration is coherent between the simulator and the .cfg file). And probably that makes sense since cache tweaks are applied when in search for performance, and that gain in performance cannot be seen in the functional simulation. So in a few days I think I could mark this question as answered.