Hello,
I am trying to program the microcontroller TMS320F2812 on an eZdsp board using CCS 5.1.1.00031. Upon debugging my code, 9 errors appear, the first one being
#10010 errors encountered during linking; "timertry.out" not built
and the following errors possibly related to this one (they regard memory issues). Other posts on the same error message were not helpful in this case.
What I have done:
- create a new CCS project, select C2000, F2812, parallel port emulator
- write the below code; it is supposed to make two timers work, although I could not test this yet since the code will not run
- copy the device-specific header files, DSP281x_Device.h and the ones this file calls, into the project folder
- debug
This results in the above error message.
What I have tried to solve the problem:
- copy DSP281x_GlobalVariableDefs.c into the project folder -> no difference
- copy DSP281x_DefaultIsr.h, DSP281x_Examples.h, DSP281x_GlobalPrototypes.h, DSP281x_SWPrioritizedIsrLevels.h into the project folder, include the examples header file -> no difference
- uncomment the 4 Init commands in the code -> no difference
- copy DSP281x_Headers_BIOS.cmd and DSP281x_Headers_nonBIOS.cmd (one at a time) into the project folder; this produces the error
#10099-D: run placement fails for
with the former file and makes no difference with the latter
What could be wrong there? I appreciate your suggestions.
Regards,
Adrian
/*
* main.c
*
* use the GP timer compare and the full-compare unit of event manager A
* to get 2 equal PWM signals
* output pins: T1PWM, T2PWM, PWM1
*/
#include "DSP281x_Device.h"
#include "math.h"
//#include "DSP281x_Examples.h"
void main() {
float d=0.5;
EALLOW;
/*
InitSysCtrl();
InitPieCtrl();
InitPieVectTable();
InitPeripherals();
*/
// GP timer 1 setup -- provides time base for full-compare unit
EvaRegs.T1CON.bit.FREE=0; // stop immediately on emulation suspend
EvaRegs.T1CON.bit.SOFT=0; // ... second part of it
EvaRegs.T1CON.bit.TMODE=2; // continuous up-counting mode
EvaRegs.T1CON.bit.TPS=0; // input clock prescaler
EvaRegs.T1CON.bit.TENABLE=1; // enable timer
EvaRegs.T1CON.bit.TCLKS10=0; // use HSPCLK as clock
EvaRegs.T1CON.bit.TCLD10=0; // reload compare register T1CMPR at beginning of switching period
EvaRegs.T1CON.bit.TECMPR=1; // enable timer compare
EvaRegs.T1PR=7499; // period register = 150MHz/20kHz-1
EvaRegs.T1CMPR=round(EvaRegs.T1PR*d); // compare register for GP T1
EvaRegs.T1CNT=0; // initialize counter register
// GP timer 2 setup -- uses its own compare functionality
EvaRegs.T2CON.bit.FREE=0; // stop immediately on emulation suspend
EvaRegs.T2CON.bit.SOFT=0; // ... second part of it
EvaRegs.T2CON.bit.TMODE=2; // continuous up-counting mode
EvaRegs.T2CON.bit.TPS=0; // input clock prescaler
EvaRegs.T2CON.bit.T2SWT1=1; // enabled together with T1
EvaRegs.T2CON.bit.TCLKS10=0; // use HSPCLK as clock
EvaRegs.T2CON.bit.TCLD10=0; // reload compare register T1CMPR at beginning of switching period
EvaRegs.T2CON.bit.TECMPR=1; // enable timer compare
EvaRegs.T2CON.bit.SET1PR=1; // use T1's period register
EvaRegs.T2CMPR=round(EvaRegs.T1PR*d); // compare register for GP T2
EvaRegs.T2CNT=0; // initialize counter register
// GP timer control register (EVA)
EvaRegs.GPTCONA.bit.T2CTRIPE=0; // disable trip function that can drive output to high Z
EvaRegs.GPTCONA.bit.T1CTRIPE=0;
EvaRegs.GPTCONA.bit.TCMPOE=1; // enable compare output
EvaRegs.GPTCONA.bit.T2TOADC=0; // don't set off ADC
EvaRegs.GPTCONA.bit.T1TOADC=0;
EvaRegs.GPTCONA.bit.TCMPOE=1; // enable timer compare outputs
EvaRegs.GPTCONA.bit.T2CMPOE=1; // enable timer 2 compare outputs
EvaRegs.GPTCONA.bit.T1CMPOE=1; // enable timer 1 compare outputs
EvaRegs.GPTCONA.bit.T2PIN=1; // polarity of GP timer 2 (1 = active L, 2 = active H)
EvaRegs.GPTCONA.bit.T1PIN=1;
// GP timer compare control register (EVA)
EvaRegs.COMCONA.bit.CENABLE=1; // enable compare
EvaRegs.COMCONA.bit.CLD=0; // reload compare register CMPR at beginning of switching period
EvaRegs.COMCONA.bit.ACTRLD=0; // reload action control register at beginning of switching period
EvaRegs.COMCONA.bit.FCOMPOE=1; // enable full compare outputs
EvaRegs.COMCONA.bit.FCMP1OE=1; // enable full compare 1 outputs (PWM1,2)
EvaRegs.COMCONA.bit.C1TRIPE=0; // disable trip function that can drive output to high Z
// compare action control register (EVA)
EvaRegs.ACTRA.bit.CMP1ACT=1; // polarity of PWM1 (1 = active L, 2 = active H)
// CMPR1 register
EvaRegs.CMPR1=round(EvaRegs.T1PR*d); // compare register for PWM1
EDIS;
while(1){
;
}
}
