Good afternoon all!
I've had a target configuration set up for my hardware which has been working fine on a T1814x using the XDS560V2 STM USB Emulator. However, now I'm trying to run it on new hardware which is exactly the same except the processor has changed from a C6A to a DM part number, something which data sheets say require no hardware or software changes (if this is important I could find out more information).
Either way, pressing the JTAG DR Integrity test passes on the new hardware with the follow.ing printout:
[Start]
Execute the command:
%ccs_base%/common/uscif/dbgjtag.exe -f %boarddatafile% -rv -F inform,logfile=yes -S pathlength -S integrity
[Result]
-----[Print the reset-command software log-file]-----------------------------
This utility has selected a 560-class product.
This utility will load the program 'sd560v2u.out'.
The library build date was 'Oct 27 2011'.
The library build time was '17:22:46'.
The library package version is '5.0.520.0'.
The library component version is '35.34.38.0'.
The controller does not use a programmable FPGA.
The controller has a version number of '5' (0x00000005).
The controller has an insertion length of '0' (0x00000000).
The cable+pod has a version number of '8' (0x00000008).
The cable+pod has a capability number of '7423' (0x00001cff).
This utility will now attempt to reset the controller.
This utility has successfully reset the controller.
This utility will load the program 'sd560v2u.out'.
The library build date was 'Oct 27 2011'.
The library build time was '17:22:46'.
The library package version is '5.0.520.0'.
The library component version is '35.34.38.0'.
The controller does not use a programmable FPGA.
The controller has a version number of '5' (0x00000005).
The controller has an insertion length of '0' (0x00000000).
The cable+pod has a version number of '8' (0x00000008).
The cable+pod has a capability number of '7423' (0x00001cff).
This utility will now attempt to reset the controller.
This utility has successfully reset the controller.
-----[Print the reset-command hardware log-file]-----------------------------
The scan-path will be reset by toggling the JTAG TRST signal.
The controller is the Nano-TBC VHDL.
The link is a 560-class second-generation-560 cable.
The software is configured for Nano-TBC VHDL features.
The controller will be software reset via its registers.
The controller has a logic ONE on its EMU[0] input pin.
The controller has a logic ONE on its EMU[1] input pin.
The controller will use falling-edge timing on output pins.
The controller cannot control the timing on input pins.
The scan-path link-delay has been set to exactly '2' (0x0002).
The utility logic has not previously detected a power-loss.
The utility logic is not currently detecting a power-loss.
The controller is the Nano-TBC VHDL.
The link is a 560-class second-generation-560 cable.
The software is configured for Nano-TBC VHDL features.
The controller will be software reset via its registers.
The controller has a logic ONE on its EMU[0] input pin.
The controller has a logic ONE on its EMU[1] input pin.
The controller will use falling-edge timing on output pins.
The controller cannot control the timing on input pins.
The scan-path link-delay has been set to exactly '2' (0x0002).
The utility logic has not previously detected a power-loss.
The utility logic is not currently detecting a power-loss.
-----[The log-file for the JTAG TCLK output generated from the PLL]----------
Test Size Coord MHz Flag Result Description
~~~~ ~~~~ ~~~~~~~ ~~~~~~~~ ~~~~ ~~~~~~~~~~~ ~~~~~~~~~~~~~~~~~~~
1 512 - 01 00 500.0kHz O good value measure path length
2 512 + 05 20 48.00MHz [O] good value apply explicit tclk
~~~~ ~~~~ ~~~~~~~ ~~~~~~~~ ~~~~ ~~~~~~~~~~~ ~~~~~~~~~~~~~~~~~~~
1 512 - 01 00 500.0kHz O good value measure path length
2 512 + 05 20 48.00MHz [O] good value apply explicit tclk
The first internal/external clock test was not done.
The second internal/external clock test was not done.
In the scan-path tests:
The test length was 16384 bits.
The JTAG IR length was 6 bits.
The JTAG DR length was 1 bits.
The test length was 16384 bits.
The JTAG IR length was 6 bits.
The JTAG DR length was 1 bits.
The IR/DR scan-path tests used 2 frequencies.
The IR/DR scan-path tests used 500.0kHz as the initial frequency.
The IR/DR scan-path tests used 48.00MHz as the highest frequency.
The IR/DR scan-path tests used 48.00MHz as the final frequency.
The IR/DR scan-path tests used 500.0kHz as the initial frequency.
The IR/DR scan-path tests used 48.00MHz as the highest frequency.
The IR/DR scan-path tests used 48.00MHz as the final frequency.
-----[Measure the source and frequency of the final JTAG TCLKR input]--------
The frequency of the JTAG TCLKR input is measured as 12.80MHz.
The frequency of the JTAG TCLKR input and TCLKO output signals are different.
The target system likely returns a fixed or adaptive TCLKR to the emulator.
The target system likely returns a fixed or adaptive TCLKR to the emulator.
-----[Perform the standard path-length test on the JTAG IR and DR]-----------
This path-length test uses blocks of 512 32-bit words.
|| // -- \\ The test for the JTAG IR instruction path-length succeeded.
The JTAG IR instruction path-length is 6 bits.
The JTAG IR instruction path-length is 6 bits.
The test for the JTAG DR bypass path-length succeeded.
The JTAG DR bypass path-length is 1 bits.
The JTAG DR bypass path-length is 1 bits.
-----[Perform the Integrity scan-test on the JTAG IR]------------------------
This test will use blocks of 512 32-bit words.
This test will be applied just once.
This test will be applied just once.
Do a test using 0xFFFFFFFF.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 0
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 0
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 0
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 0
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 0
All of the values were scanned correctly.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 0
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 0
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 0
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 0
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 0
All of the values were scanned correctly.
The JTAG IR Integrity scan-test has succeeded.
-----[Perform the Integrity scan-test on the JTAG DR]------------------------
This test will use blocks of 512 32-bit words.
This test will be applied just once.
This test will be applied just once.
Do a test using 0xFFFFFFFF.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 0
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 0
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 0
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 0
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 0
All of the values were scanned correctly.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 0
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 0
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 0
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 0
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 0
All of the values were scanned correctly.
The JTAG DR Integrity scan-test has succeeded.
[End]
However, when attempting to connect to the device I get the following error:
Error connecting to the target:
(Error -241 @ 0x0)
A router subpath could not be accessed.
A security error has probably occurred.
(Emulation package 5.0.520.0)
Upon clicking retry I get this error:
Error connecting to the target:
(Error -5005 @ 0x0)
Device ID is not recognized or is not supported by driver. Confirm device and emulator configuration is correct, or update device driver.
(Emulation package 5.0.520.0)
Any leads, advice or general help with this issue would be really great.
Thanks,
Mark
Edit: Changed C68 to C6A.
